AXI-Attached Deterministic TCM / ECC Scratchpad

What it is

axi_tcm is a bank-interleaved, SECDED-protected tightly-coupled memory (TCM) / scratchpad macro exposed through a single synchronous host port (h_req/h_we/h_addr/h_wdata → h_rvalid/h_rdata, a fixed 1-cycle read latency) rather than a native AXI or TileLink slave.

Key Features

• Bank-interleaved addressing: NBANK banks selected by h_addr[AW-1:AW_BANK], 2**AW_BANK 32-bit words per bank, single synchronous host port with a fixed 1-cycle read latency
• Per-word SECDED with check bits in a separate golden array from the data — a single-bit upset is corrected in-line (sbe); a double-bit error raises err_code 2
• Complementary-DMR address shadow (addr_cmpl_q = ~word_addr) catches a wrong-but-valid word select that SECDED alone cannot see, folded into the same err_code 2
• inj_data_xor / inj_chk_xor DFT ports exercise the SECDED path directly (tied 0 in mission mode) for a diagnostic-coverage fault-injection campaign
• No native bus protocol by design — pairs with a thin AXI4/TileLink adapter (the catalog’s axi_rd_to_tcm: a 3-state FSM terminating one outstanding AXI4 read burst per beat)
• Deterministic, fixed-latency access with no internal arbitration — usable as a bus-attached scratchpad for a lockstep safety core or as AI-datapath staging RAM (external memory → axi_tcm → tensor_dma → ai_mac cluster)
• err_clear/err_valid/err_code[3:0] into the catalog-standard safety_monitor; single clock domain verified by inspection against its only repository integration (npu_island)

Standards & Compliance

AMBA AXI4 / TileLink UL attach via a thin host-port adapter (e.g. axi_rd_to_tcm); ISO 26262 ASIL-B SEooC (SPFM 99.30%, LFM 100.00%, PMHF 8.37×10⁻¹⁰/h)

Functional Safety

ASIL-B target (SEooC) · SPFM 99.30% · LFM 100.00% · Informational — not gated

Informational FMEDA — this IP is reported but NOT gated. The SPFM/LFM figures above are engineering estimates from a model that is not held to the ASIL metric gates (QM, safety-by-composition, a vendor-core overlay, or a pre-sign-off Technology Preview, depending on the IP). They are not a certification claim and must not be relied on as one. See the safety manual for this IP’s exact status, assumptions of use, and any open items.

ISO 26262:2018 · FMEDA available · Safety Manual included

Register Map

See datasheet for full register reference.

Getting Started

// Minimal instantiation
axi_tcm #(
 .ADDR_W(6)
) u_axi_tcm (
 .clk (clk),
 .rst_n (rst_n),
 // APB4
 .p_paddr (paddr),
 .p_psel (psel),
 .p_penable (penable),
 .p_pwrite (pwrite),
 .p_pwdata (pwdata),
 .p_prdata (prdata),
 .p_pready (pready),
 // Safety
 .err_clear (1'b0),
 .err_valid (err_valid),
 .err_code (err_code)
);

Configure via the CTRL register after reset to enable the IP and set operating parameters. Monitor err_valid / err_code for any safety faults reported by the built-in safety monitor.