A real synthesis and place-and-route pass on this RTL, routed on the open Nangate45 / FreePDK45 PDK — evidence the block closes physically, not just in simulation. Target-PDK timing, area, and power sign-off figures are shared under NDA.
The deliverable
What you’re licensing
MIL-STD-1553B Remote Terminal controller, Manchester II framing + dual-redundant bus inputs, ASIL-B / DO-254-ready. It is delivered as a licensable soft-IP block engineered as an ASIL-B Safety Element out of Context — not just RTL, but the complete functional-safety work package needed to carry it into an ISO 26262 program:
Synthesizable RTL
Portable, vendor-neutral SystemVerilog that drops onto your existing SoC fabric — no foundry or EDA-tool lock-in.
Per-IP FMEDA report
SPFM / LFM / PMHF computed against the ASIL target per ISO 26262-5 — the quantitative analysis your assessor asks for.
Safety manual
Assumptions of use, the safety mechanisms and their diagnostic coverage — written to drop straight into your safety case.
IP-XACT + integration docs
A machine-readable descriptor plus register and integration documentation for fast, low-risk bring-up.
Self-checking testbench
A self-checking testbench and a one-command build, so you can reproduce every claim on day one.
What it is
A configurable MIL-STD-1553B Remote Terminal (RT) controller delivered as synthesizable SystemVerilog soft-IP.
Key Features
Manchester II bi-phase-L encode/decode (1 = H→L, 0 = L→H) with a programmable half-bit period (MAN_HALF = clk_Hz/2e6 for the standard 1 Mbps rate) and sync-pattern classification (command/status vs. data) by 1.5-bit-time level duration
RT protocol FSM (IDLE→RX_CMD→{RX_DATA×WC→TX_STATUS | TX_STATUS→TX_DATA×WC}) decodes RTADDR/T_R/SUBADDR/WORDCNT, answers only commands addressed to its own 5-bit RTADDR, and streams up to 32 data words per message (WORDCNT=0 decodes as 32 words per 1553B)
Dual-redundant bus inputs (bus_a_i/bus_b_i), each independently 2-FF synchronized, terminating at the decoded Manchester level — the transformer-coupled transceiver is external; v0.1 locks the receive mux to bus A at reset, with dynamic first-valid-sync arbitration slated for a later revision
Odd-parity + sync-pattern word-level fault detection funnels into the ERR register and the shared safety_monitor as err_code 3
Even-parity protection on the CTRL/RTADDR config registers reports as err_code 1
Complementary-DMR lockstep shadow on the RT protocol FSM — an independent next-state cone compared every cycle — reports any divergence as err_code 9
Configure via the CTRL register after reset to enable the IP and set operating parameters. Monitor err_valid / err_code for any safety faults reported by the built-in safety monitor.
Applications
Where it fits
Typically deployed in avionics, defense, and space systems built to the ARINC, MIL-STD, and CCSDS standards.
The case
Why license it, not build it
Skip 12–18 months
The FMEDA and the safety case are already generated. You integrate a finished safety element — you don’t stand up a safety-IP program to originate one.
One vendor, one safety story
Every block in the catalog shares the same safety architecture, fault-reaction model, and FMEDA methodology — so subsystems roll up cleanly.
Verified, not vapor
The RTL builds and passes today; the safety metrics come from analysis and fault injection against real RTL, not a datasheet promise.
Interested in MIL-STD-1553B Remote Terminal (RT) Controller?
Pricing, the per-IP FMEDA, safety manual, and RTL data room are shared under a mutual NDA.
Figures are pre-silicon engineering-grade estimates for a Safety Element out of Context (SEooC); final ASIL sign-off is the integrator’s, supported under NDA. FMEDA and Safety Manual available under NDA.