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Cryptography & Data Integrity

ML-KEM Key-Encapsulation Mechanism (Kyber)

The default ML-KEM-768 (NIST Level 3) build of the catalog’s parameterized ML-KEM orchestrator — one RTL core, one golden model…

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ASIL-B
target
93.91%
SPFM
94.86%
LFM
Informational
FMEDA
22.2K
gates
1.0.0
version
Interfaces at a glance

Block diagram

mlkem_kem18 portsdata inin_* · 4 signalsdata outout_* · 3 signalscmdstartbusydonefi_parityfi_dmrclkrst_nsafety / statuserr_clear · err_valid · err_code
The deliverable

What you’re licensing

The default ML-KEM-768 (NIST Level 3) build of the catalog’s parameterized ML-KEM orchestrator — one RTL core, one golden model… It is delivered as a licensable soft-IP block engineered as an ASIL-B Safety Element out of Context — not just RTL, but the complete functional-safety work package needed to carry it into an ISO 26262 program:

Synthesizable RTL
Portable, vendor-neutral SystemVerilog that drops onto your existing SoC fabric — no foundry or EDA-tool lock-in.
Per-IP FMEDA report
SPFM / LFM / PMHF computed against the ASIL target per ISO 26262-5 — the quantitative analysis your assessor asks for.
Safety manual
Assumptions of use, the safety mechanisms and their diagnostic coverage — written to drop straight into your safety case.
IP-XACT + integration docs
A machine-readable descriptor plus register and integration documentation for fast, low-risk bring-up.
Self-checking testbench
A self-checking testbench and a one-command build, so you can reproduce every claim on day one.

mlkem_kem is the complete ML-KEM key-encapsulation mechanism (FIPS 203, formerly CRYSTALS-Kyber) — the NIST-standardized, quantum-resistant replacement for RSA/ECDH key exchange — built as one parameterized RTL core covering all three NIST security levels (ML-KEM-512/768/1024, delivered as mlkem_kem_512 / mlkem_kem / mlkem_kem_1024).

Key Features

Standards & Compliance

NIST FIPS 203 (ML-KEM/Kyber, Level 3 default; Level 1/5 via mlkem_kem_512/_1024); FIPS 202 (SHA-3/SHAKE); ISO 26262 ASIL-B SEooC, informational preview (SPFM 93.91%, LFM 94.86%, PMHF 4.04×10⁻⁸/h pre-sign-off)

Functional Safety

ASIL-B target (SEooC) · SPFM 93.91% · LFM 94.86% · Informational — not gated

Informational FMEDA — this IP is reported but NOT gated. The SPFM/LFM figures above are engineering estimates from a model that is not held to the ASIL metric gates (QM, safety-by-composition, a vendor-core overlay, or a pre-sign-off Technology Preview, depending on the IP). They are not a certification claim and must not be relied on as one. See the safety manual for this IP’s exact status, assumptions of use, and any open items.

ISO 26262:2018 · FMEDA available · Safety Manual included

Register Map

See datasheet for full register reference.

Getting Started

// Minimal instantiation
mlkem_kem #(
 .ADDR_W(6)
) u_mlkem_kem (
 .clk (clk),
 .rst_n (rst_n),
 // APB4
 .p_paddr (paddr),
 .p_psel (psel),
 .p_penable (penable),
 .p_pwrite (pwrite),
 .p_pwdata (pwdata),
 .p_prdata (prdata),
 .p_pready (pready),
 // Safety
 .err_clear (1'b0),
 .err_valid (err_valid),
 .err_code (err_code)
);

Configure via the CTRL register after reset to enable the IP and set operating parameters. Monitor err_valid / err_code for any safety faults reported by the built-in safety monitor.

Applications

Where it fits

Typically deployed in secure boot, firmware authentication, key storage, and confidential on-board communication.

The case

Why license it, not build it

Skip 12–18 months
The FMEDA and the safety case are already generated. You integrate a finished safety element — you don’t stand up a safety-IP program to originate one.
One vendor, one safety story
Every block in the catalog shares the same safety architecture, fault-reaction model, and FMEDA methodology — so subsystems roll up cleanly.
Verified, not vapor
The RTL builds and passes today; the safety metrics come from analysis and fault injection against real RTL, not a datasheet promise.

Interested in ML-KEM Key-Encapsulation Mechanism (Kyber)?

Pricing, the per-IP FMEDA, safety manual, and RTL data room are shared under a mutual NDA.

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Figures are pre-silicon engineering-grade estimates for a Safety Element out of Context (SEooC); final ASIL sign-off is the integrator’s, supported under NDA. FMEDA and Safety Manual available under NDA.

circuit-design.space · +1-971-357-1400 · anovickis@circuit-design.space