Case snippets drawn from the CV. Each is short, specific, and
anonymized where needed. Review and mark up anything that should be
softened, expanded, or removed.
Autonomous-vehicle
drive-by-wire ECU — Tier-1 / OEM program
Role: Principal electronics engineer · safety lead
Tools: Infineon TriCore 399XX · FPGA · AUTOSAR · CAN ·
DDR4 · PCIe 3 · GMSL/APHY
Architected and implemented automotive ECUs enabling drive-by-wire
control for a production autonomous vehicle. Designed redundant circuits
and channels for isolated power, CAN, and analog interfaces. Authored
FTA, FMEA, and FMEDA documentation to ISO 26262 ASIL-D
safety goals. Ran thermal aging and vibration studies in Ansys and
Sherlock.
Result: ECUs delivered meeting ASIL-D for production
deployment.
ADAS reference
platform — Vision + sensor fusion
Role: Principal electronics engineer
Tools: TI TDA4VH Jacinto · MIPI · APHY · GMSL camera
feeds · PCIe Gen3 · DDR4
Designed an ADAS system on the TI TDA4VH Jacinto SoC. Integrated
multiple camera interfaces (MIPI, APHY, GMSL), high-bandwidth memory,
and PCIe connectivity with the vehicle compute stack. Reverse-engineered
interfaces to OEM components — IDBU, MPAS, torque/angle sensors, e-stop,
SSB — to land the integration without vendor cooperation.
Ethernet
switching product line — multi-generation, 38 designs
Role: CTO and lead electronics engineer
Tools: Marvell Lion/Cheetah2/Bobcat2/Xpliant · Broadcom
· Octeon · Fulcrum · Intel · custom FPGA · SystemC · TLA+
Shipped 38 Ethernet switching designs across multiple generations of
high-port-count network monitoring switches. Port capacities scaled to
120 Tb/s. Ownership across silicon choice, board design
(25 Gbps SerDes), backplane SI, DDR3/DDR4/LPDDR5X memory integration,
and custom FPGA packet-editor/filter IP. Developed RISC-V Linux kernel
drivers for the custom network hardware.
Result: Lifetime revenue over $3 billion
USD; products still shipping.
Pro-AV
product line — bare-metal to Linux migration
Role: Complete product ownership
Client: Biamp
Owned six shipping networked AV / office-automation products
end-to-end — schematic to EMC to shipping. Migrated the platform from
bare-metal firmware to Linux while holding BOM
cost flat or lower and keeping the existing
plastics (no mechanical respin, no cost upside to the
customer).
Result: Six products migrated and shipped without a
cost or enclosure change.
24-FPGA Xilinx
system — RTL rescue and timing closure
Role: Senior RTL architect · 5-designer team
lead
Inherited a 24-FPGA Xilinx system with a non-synchronous RTL
implementation that was not closing timing. Re-architected the design
for synchronous practice, directed a five-engineer team through the
rework, converted the flow from Leonardo Precision to Synplicity, and
floorplanned to close timing.
Result: System shipped on the rebuilt RTL.
Apple
end-of-line test equipment — global manufacturing infrastructure
Role: Senior staff engineer · team lead
Led the team responsible for end-of-line test equipment across every
Apple production and repair facility worldwide. Owned the annual
equipment budget exceeding $220 million. Set strategy,
ran vendor selection, and signed off on the test-engineering designs
that every Mac of the era had to pass before leaving the factory.
Apple
68K-to-PowerPC transition — JIT compiler
Role: Firmware engineer
Contributed to the JIT compiler that bridged Apple’s processor
architecture transition from Motorola 68K to PowerPC. Also worked on
operating-system firmware and OS boot-process triage during the same
period.
ASIC
and system firmware, test coverage — Silicon Graphics
Role: Firmware and test-coverage engineer
Firmware development and test-coverage engineering for ASICs and the
systems they landed in. Worked alongside silicon and platform teams to
build the coverage infrastructure that backed up the ASIC bring-up.
NUMA-Q
server platform — chassis-controller firmware and memory-ASIC
validation
Role: Firmware team lead and RTL designer
Client: IBM (post Sequent acquisition)
Owned chassis-controller firmware and ASIC
validation for the memory subsystem on the NUMA-Q
architecture — one of the foundational commercial NUMA server
platforms. Worked across firmware, RTL, and built-in server diagnostics
to harden the memory path through silicon bring-up.
SS7
protocol-processing engines — telecom encryption and roaming
Role: Senior software engineer (consulting)
Client: Synacom
Designed and implemented protocol-processing engines
for the encryption layer of IS-41 / TR-54 SS7
transactions. Covered mobile authentication,
HLR / VLR exchanges, and cross-network
roaming between carriers.
DNA
electrophoresis scanner and image-processing pipeline
Role: Hardware / firmware engineer (consulting)
Client: Molecular Dynamics → Amersham → GE
Healthcare
Designed scanner hardware and image-processing pipeline for a
DNA-electrophoresis system used in genetic analysis. Covered acquisition
front-end, gain control, image normalization, and downstream feature
handling. Spanned the Molecular Dynamics → Amersham → GE Healthcare
ownership transitions.
High-resolution
X-ray greyscale video card with feature extraction
Role: Hardware / firmware engineer (consulting)
Client: Luminex
Designed a high-resolution greyscale video acquisition card for X-ray
imaging with on-board feature-extraction logic.
Acquisition pipeline matched to medical-imaging dynamic-range
requirements; on-card processing reduced host-side load and enabled
real-time region-of-interest analysis.
Single-occupant
submersible scuba propulsion craft
Role: Electronics + waterproofing engineer
(consulting)
Designed the electronics package and the
full salt-water waterproofing stack for a personal
submersible watercraft — single-occupant scuba propulsion. Covered
sealing, materials selection, corrosion control, and depth-rated wet/dry
barriers. Marine electronics fail in interesting ways; this one
didn’t.
Secure media delivery —
protected channel
Role: Engineer (consulting) Client:
Intel
Worked on a separate Intel engagement focused on protected
media delivery over a secure channel — content protection, key
handling, and the media-pipeline integration that surrounds it.
Patient vitals monitor
Role: Hardware / firmware engineer (consulting)
Client: Welch Allyn
Consulted on a medical-grade vitals monitor — the patient-monitoring
class of device responsible for continuous capture of pulse, oxygen
saturation, blood pressure, and temperature in clinical settings. Worked
across hardware, firmware, and the design-for-reliability practices
required for life-supporting medical equipment.
Console-game development
system
Role: Hardware / firmware engineer (consulting)
Client: Game-development studio (Menlo Park, CA)
Designed a hardware development system for SEGA and
NES game development — the kind of cartridge / cart-emulator
and bus-debug rig that lets a studio prototype titles before silicon is
committed. Early-1990s console era.
Medical-device DSP firmware
Role: Consulting DSP engineer
Tools: TI DSP platform
Developed TI DSP code for medical equipment applications.
Wireless channel modelling —
802.11
Role: Wireless modelling and simulations engineer
(Intel) Tools: MATLAB · XFTD · Wireless InSite
Designed and automated experiments for microwave propagation channel
modelling. Directed field experiments for 802.11 throughput and protocol
simulation.
Document-systems
NPI — firmware and hardware debug
Role: Applications engineer Client:
Tektronix Printer Division (later Xerox)
Supported new-product introduction in document systems — print, fax,
scanning — through the Tektronix-to-Xerox acquisition. Monitored field
reports and tracked bugs to resolution across firmware, hardware, and
drivers.
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Work Samples
A selection of circuit boards, schematics, and layouts from shipped products and client work. Photos shown here are from public collateral — nothing under active NDA.
Curated selection, not a complete portfolio.
