The deliverable
What you’re licensing
Descriptor-ring DMA offload for CAN/CAN-FD RX/TX to system memory — pairs with can_fd, ASIL-B. It is delivered as a licensable soft-IP block engineered as an ASIL-B Safety Element out of Context — not just RTL, but the complete functional-safety work package needed to carry it into an ISO 26262 program:
Synthesizable RTL
Portable, vendor-neutral SystemVerilog that drops onto your existing SoC fabric — no foundry or EDA-tool lock-in.
Per-IP FMEDA report
SPFM / LFM / PMHF computed against the ASIL target per ISO 26262-5 — the quantitative analysis your assessor asks for.
Safety manual
Assumptions of use, the safety mechanisms and their diagnostic coverage — written to drop straight into your safety case.
IP-XACT + integration docs
A machine-readable descriptor plus register and integration documentation for fast, low-risk bring-up.
Self-checking testbench
A self-checking testbench and a one-command build, so you can reproduce every claim on day one.
can_dma is a synthesizable DMA engine that autonomously moves CAN/CAN-FD frames between a controller’s framed RX/TX interface and system memory — writing received frames into a circular ring and reading transmit frames from an indexed array — with no per-frame CPU intervention.
Key Features
- RX engine (R_IDLE→R_WR→R_ACK): on rx_frame_valid, streams the 4-word/16-byte frame (ID[28:0], CTRL[7:0], DATA_LO, DATA_HI) into a circular ring at RX_BASE+rx_ptr·16, wraps rx_ptr at RX_SIZE, increments the monotonic RX_HEAD, and pulses rx_frame_ack + RX_IRQ
- TX engine (T_IDLE→T_RD→T_SEND): a TX_TRIG index write fetches the 4-word descriptor at TX_BASE+idx·16 over the memory port and drives it out tx_frame_req/id/ctrl/data until tx_frame_ack, setting TX_DONE
- True 64-bit wide-word SECDED (ecc_pkg::ecc_enc64/ecc_dec64, 7 Hamming + 1 overall-parity check bits) over the full in-flight CAN payload each direction — any single-bit upset is corrected in-line, any double-bit → err_code 2 (combined with even parity over the 29-bit ID / 8-bit CTRL fields)
- Even parity over all eight addressing/config registers — CTRL, RX_BASE, rx_ptr, RX_HEAD, t_addr, tx_idx, RX_SIZE, TX_BASE — a mismatch raises err_code 1
- Independent complementary-DMR shadow FSM on both the RX and TX engines (diverse next-state cones, synthesis-kept against merging) → err_code 9, aggregated into the shared safety_monitor
- Single 32-bit-word combinational memory-master port (mem_addr/mem_wdata/mem_we/mem_re/mem_rdata) with fixed RX-write priority over a TX read — 4 cycles per frame each way; needs a 0-cycle SRAM or a registered bridge with a 1-deep read buffer
- Generic rx_frame_/tx_frame_ handshake — the same convention the catalog’s dronecan/arinc825/ecss_can protocol layers use above a CAN core — so it drops in behind any framed CAN/CAN-FD source; can_fd’s own RX/TX are APB-mapped registers today (RXID/RXCTRL/RXDATA/RXPOP, TXID/TXCTRL/TXDATA/TXREQ), so pairing the two needs a thin adapter
Standards & Compliance
ISO 11898-1 CAN 2.0B / CAN-FD frame format (payload carried, not re-validated); external ISO 11898-2/3 transceiver via the attached CAN core (e.g. can_fd); ISO 26262 ASIL-B SEooC (SPFM 97.91%, LFM 100.00%, PMHF 1.46×10⁻⁹/h)
Functional Safety
ASIL-B (SEooC) · SPFM 97.91% · LFM 100.00% · PASS
ISO 26262:2018 · FMEDA available · Safety Manual included
Register Map
| Offset | Register | Description |
|---|
0x00 | CTRL | [0]=EN [1]=RX_EN [2]=TX_EN 0x04 RX_BASE 0x08 RX_SIZE(frames) 0x0C RX_HEAD(RO) |
0x10 | TX_BASE | 0x14 TX_TRIG(write idx) 0x18 STATUS [0]=RX_IRQ(W1C)[1]=TX_DONE(W1C)[2]=BUSY 0x1C IER |
Getting Started
// Minimal instantiation
can_dma #(
.ADDR_W(6)
) u_can_dma (
.clk (clk),
.rst_n (rst_n),
// APB4
.p_paddr (paddr),
.p_psel (psel),
.p_penable (penable),
.p_pwrite (pwrite),
.p_pwdata (pwdata),
.p_prdata (prdata),
.p_pready (pready),
// Safety
.err_clear (1'b0),
.err_valid (err_valid),
.err_code (err_code)
);
Configure via the CTRL register after reset to enable the IP and set operating parameters. Monitor err_valid / err_code for any safety faults reported by the built-in safety monitor.
Applications
Where it fits
Typically deployed in in-vehicle networks, industrial gateways, and sensor/actuator links where a bus controller has to carry its own safety argument.
Figures are pre-silicon engineering-grade estimates for a Safety Element out of Context (SEooC); final ASIL sign-off is the integrator’s, supported under NDA. FMEDA and Safety Manual available under NDA.