← All IP · the catalog
Motor, Power & Sensor Control

Field-Oriented-Control (FOC) Motor Datapath

Verified, safety-instrumented FOC current-loop core for BLDC/PMSM drives — the torque-regulation brain of a drone ESC or industrial servo axis, ASIL-B.

Request this IP →Browse the catalog
ASIL-B
target
91.60%
SPFM
88.41%
LFM
Informational
FMEDA
2.2K
gates
1.0.0
version
Interfaces at a glance

Block diagram

foc_motor21 portsapb_slave8 signalsi_*3 signalsduty_*3 signalsthetatickclkrst_ninterruptfoc_irqsafety / statuserr_clear · err_valid
Place-and-route snapshot

Physical implementation

Field-Oriented-Control (FOC) Motor Datapath routed place-and-route layout on the Nangate45 PDK
A real synthesis and place-and-route pass on this RTL, routed on the open Nangate45 / FreePDK45 PDK — evidence the block closes physically, not just in simulation. Target-PDK timing, area, and power sign-off figures are shared under NDA.
The deliverable

What you’re licensing

Verified, safety-instrumented FOC current-loop core for BLDC/PMSM drives — the torque-regulation brain of a drone ESC or industrial servo axis, ASIL-B. It is delivered as a licensable soft-IP block engineered as an ASIL-B Safety Element out of Context — not just RTL, but the complete functional-safety work package needed to carry it into an ISO 26262 program:

Synthesizable RTL
Portable, vendor-neutral SystemVerilog that drops onto your existing SoC fabric — no foundry or EDA-tool lock-in.
Per-IP FMEDA report
SPFM / LFM / PMHF computed against the ASIL target per ISO 26262-5 — the quantitative analysis your assessor asks for.
Safety manual
Assumptions of use, the safety mechanisms and their diagnostic coverage — written to drop straight into your safety case.
IP-XACT + integration docs
A machine-readable descriptor plus register and integration documentation for fast, low-risk bring-up.
Self-checking testbench
A self-checking testbench and a one-command build, so you can reproduce every claim on day one.

What it is

foc_motor is a Field-Oriented-Control (FOC) motor-control datapath for BLDC/PMSM machines (drone propulsion + industrial servo), delivered as synthesizable SystemVerilog soft-IP with an APB4-lite control interface and built-in ISO 26262 (ASIL-B) safety instrumentation.

Key Features

Standards & Compliance

Field-Oriented-Control (Clarke/Park/SVPWM) current-loop algorithm; APB4-lite config interface; ISO 26262 ASIL-B SEooC (SPFM 91.60%, LFM 88.41%, PMHF 3.43×10⁻⁹/h)

Functional Safety

ASIL-B target (SEooC) · SPFM 91.60% · LFM 88.41% · Informational — not gated

Informational FMEDA — this IP is reported but NOT gated. The SPFM/LFM figures above are engineering estimates from a model that is not held to the ASIL metric gates (QM, safety-by-composition, a vendor-core overlay, or a pre-sign-off Technology Preview, depending on the IP). They are not a certification claim and must not be relied on as one. See the safety manual for this IP’s exact status, assumptions of use, and any open items.

ISO 26262:2018 · FMEDA available · Safety Manual included

Register Map

OffsetRegisterDescription
0x00CTRL[0]=EN [1]=RUN(closed-loop) [2]=CLR_FAULT(W1) 0x04 KP_D d-axis Kp (Q4.12)
0x08KI_Dd-axis Ki (Q4.12) 0x0C KP_Q q-axis Kp (Q4.12)
0x10KI_Qq-axis Ki (Q4.12) 0x14 ID_SET d setpoint (Q1.15, signed)
0x18IQ_SETq (torque) setpoint (Q1.15, signed) 0x1C ILIM current envelope (|i|,|set|)
0x20DUTYLIMduty envelope (max |duty|, 0..DUTY_MAX) 0x24 POLES pole pairs (informational)

…4 more registers — see datasheet for the full table.

Getting Started

// Minimal instantiation
foc_motor #(
 .ADDR_W(6)
) u_foc_motor (
 .clk (clk),
 .rst_n (rst_n),
 // APB4
 .p_paddr (paddr),
 .p_psel (psel),
 .p_penable (penable),
 .p_pwrite (pwrite),
 .p_pwdata (pwdata),
 .p_prdata (prdata),
 .p_pready (pready),
 // Safety
 .err_clear (1'b0),
 .err_valid (err_valid),
 .err_code (err_code)
);

Configure via the CTRL register after reset to enable the IP and set operating parameters. Monitor err_valid / err_code for any safety faults reported by the built-in safety monitor.

Applications

Where it fits

Typically deployed in motor drives, power conversion, and sensor front-ends in automotive and industrial systems.

The case

Why license it, not build it

Skip 12–18 months
The FMEDA and the safety case are already generated. You integrate a finished safety element — you don’t stand up a safety-IP program to originate one.
One vendor, one safety story
Every block in the catalog shares the same safety architecture, fault-reaction model, and FMEDA methodology — so subsystems roll up cleanly.
Verified, not vapor
The RTL builds and passes today; the safety metrics come from analysis and fault injection against real RTL, not a datasheet promise.

Interested in Field-Oriented-Control (FOC) Motor Datapath?

Pricing, the per-IP FMEDA, safety manual, and RTL data room are shared under a mutual NDA.

Talk to us →See related IP

Figures are pre-silicon engineering-grade estimates for a Safety Element out of Context (SEooC); final ASIL sign-off is the integrator’s, supported under NDA. FMEDA and Safety Manual available under NDA.

circuit-design.space · +1-971-357-1400 · anovickis@circuit-design.space