Serial, Networking & Storage

GNSS Parser + PPS

Hardware UBX/NMEA GNSS parser with checksum-verified PVT and PPS timepulse capture, ASIL-B.

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ASIL-B

target

93.50%

SPFM

90.00%

LFM

Informational

FMEDA

2.6K

gates

1.0.0

version

Interfaces at a glance

Block diagram

Place-and-route snapshot

Physical implementation

GNSS Parser + PPS routed place-and-route layout on the Nangate45 PDK — A real synthesis and place-and-route pass on this RTL, routed on the open Nangate45 / FreePDK45 PDK — evidence the block closes physically, not just in simulation. Target-PDK timing, area, and power sign-off figures are shared under NDA.

The deliverable

What you’re licensing

Hardware UBX/NMEA GNSS parser with checksum-verified PVT and PPS timepulse capture, ASIL-B. It is delivered as a licensable soft-IP block engineered as an ASIL-B Safety Element out of Context — not just RTL, but the complete functional-safety work package needed to carry it into an ISO 26262 program:

Synthesizable RTL

Portable, vendor-neutral SystemVerilog that drops onto your existing SoC fabric — no foundry or EDA-tool lock-in.

Per-IP FMEDA report

SPFM / LFM / PMHF computed against the ASIL target per ISO 26262-5 — the quantitative analysis your assessor asks for.

Safety manual

Assumptions of use, the safety mechanisms and their diagnostic coverage — written to drop straight into your safety case.

IP-XACT + integration docs

A machine-readable descriptor plus register and integration documentation for fast, low-risk bring-up.

Self-checking testbench

A self-checking testbench and a one-command build, so you can reproduce every claim on day one.

What it is

gnss_parser is a hardware GNSS-message parser (#DRONE-4), delivered as synthesizable SystemVerilog soft-IP with an APB4-lite control interface and built-in ISO 26262 (ASIL-B) safety instrumentation.

Key Features

Two protocols, one parser FSM: UBX (Fletcher-8) and NMEA-0183 (XOR), APB-selectable or auto-detected from the first sync byte
UBX-NAV-PVT field extraction: iTOW, fixType, numSV, lon, lat, height, ground-speed decoded little-endian into APB registers + fabric mirrors
PPS timepulse capture: free-running timestamp latched on the synchronized pps\_i rising edge into PPS_TS, with a one-shot PPS_FRESH strobe
Checksum-then-plausibility publish gate: only a checksum-clean, latitude/fix-type-plausible UBX-NAV-PVT sets FIX_VALID — err_code 3 on failure
Fix/message staleness watchdog (CFG.STALE_N ticks) drops FIX_VALID and reports err_code 4 if no fresh, valid fix lands in time
Config-register even parity (err_code 1) and complementary-redundant DMR on the parser FSM (err_code 9), each with a dedicated fi\_\* fault-inject port for self-test
APB4-lite register file (CTRL/STATUS/CFG/ITOW/LAT/LON/HEIGHT/VEL/NUMSV/PPS_TS/IER/ISR/ERR/FI) with W1C ISR/ERR and a level gnss\_irq

Standards & Compliance

u-blox UBX, NMEA-0183; ISO 26262 ASIL-B SEooC, engineering-FMEDA PASS (SPFM 93.50%, LFM 90.00%, PMHF 3.18×10⁻⁹/h, pre-sign-off)

Functional Safety

ASIL-B target (SEooC) · SPFM 93.50% · LFM 90.00% · Informational — not gated

Informational FMEDA — this IP is reported but NOT gated. The SPFM/LFM figures above are engineering estimates from a model that is not held to the ASIL metric gates (QM, safety-by-composition, a vendor-core overlay, or a pre-sign-off Technology Preview, depending on the IP). They are not a certification claim and must not be relied on as one. See the safety manual for this IP’s exact status, assumptions of use, and any open items.

ISO 26262:2018 · FMEDA available · Safety Manual included

Register Map

Offset	Register	Description
`0x00`	CTRL	[0]EN [2:1]MODE(0=auto 1=UBX 2=NMEA) [3]TMO_EN (parity-protected)
`0x04`	STATUS	[0]FIX_VALID [1]UBX_OK [2]NMEA_OK [3]STALE [4]PPS_FRESH [7:5]FIXTYPE
`0x08`	CFG	[15:0]STALE_N — fix-staleness timeout in clk-ticks (parity-protected)
`0x0C`	ITOW	[31:0]iTOW (ms of GPS week) from the last UBX-NAV-PVT
`0x10`	LAT	[31:0]latitude (1e-7 deg, signed) — UBX-NAV-PVT lat

…9 more registers — see datasheet for the full table.

Getting Started

// Minimal instantiation
gnss_parser #(
 .ADDR_W(6)
) u_gnss_parser (
 .clk (clk),
 .rst_n (rst_n),
 // APB4
 .p_paddr (paddr),
 .p_psel (psel),
 .p_penable (penable),
 .p_pwrite (pwrite),
 .p_pwdata (pwdata),
 .p_prdata (prdata),
 .p_pready (pready),
 // Safety
 .err_clear (1'b0),
 .err_valid (err_valid),
 .err_code (err_code)
);

Configure via the CTRL register after reset to enable the IP and set operating parameters. Monitor err_valid / err_code for any safety faults reported by the built-in safety monitor.

Applications

Where it fits

Typically deployed in in-vehicle networks, industrial gateways, and sensor/actuator links where a bus controller has to carry its own safety argument.

The case

Why license it, not build it

Skip 12–18 months

The FMEDA and the safety case are already generated. You integrate a finished safety element — you don’t stand up a safety-IP program to originate one.

One vendor, one safety story

Every block in the catalog shares the same safety architecture, fault-reaction model, and FMEDA methodology — so subsystems roll up cleanly.

Verified, not vapor

The RTL builds and passes today; the safety metrics come from analysis and fault injection against real RTL, not a datasheet promise.

Interested in GNSS Parser + PPS?

Pricing, the per-IP FMEDA, safety manual, and RTL data room are shared under a mutual NDA.

Talk to us →See related IP

Figures are pre-silicon engineering-grade estimates for a Safety Element out of Context (SEooC); final ASIL sign-off is the integrator’s, supported under NDA. FMEDA and Safety Manual available under NDA.

circuit-design.space · +1-971-357-1400 · anovickis@circuit-design.space