Drone, Robotics & UAV Safety

safety_chute — UAS Flight-Termination / Parachute Controller

Deterministic, ASIL-B-leaning hardware flight-termination controller for UAS/eVTOL parachute deployment per ASTM F3322 — the independent mitigation…

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ASIL-B

target

93.85%

SPFM

91.42%

LFM

PASS

FMEDA

800

gates

1.0.0

version

Interfaces at a glance

Block diagram

Place-and-route snapshot

Physical implementation

safety_chute — UAS Flight-Termination / Parachute Controller routed place-and-route layout on the Nangate45 PDK — A real synthesis and place-and-route pass on this RTL, routed on the open Nangate45 / FreePDK45 PDK — evidence the block closes physically, not just in simulation. Target-PDK timing, area, and power sign-off figures are shared under NDA.

The deliverable

What you’re licensing

Deterministic, ASIL-B-leaning hardware flight-termination controller for UAS/eVTOL parachute deployment per ASTM F3322 — the independent mitigation… It is delivered as a licensable soft-IP block engineered as an ASIL-B Safety Element out of Context — not just RTL, but the complete functional-safety work package needed to carry it into an ISO 26262 program:

Synthesizable RTL

Portable, vendor-neutral SystemVerilog that drops onto your existing SoC fabric — no foundry or EDA-tool lock-in.

Per-IP FMEDA report

SPFM / LFM / PMHF computed against the ASIL target per ISO 26262-5 — the quantitative analysis your assessor asks for.

Safety manual

Assumptions of use, the safety mechanisms and their diagnostic coverage — written to drop straight into your safety case.

IP-XACT + integration docs

A machine-readable descriptor plus register and integration documentation for fast, low-risk bring-up.

Self-checking testbench

A self-checking testbench and a one-command build, so you can reproduce every claim on day one.

What it is

safety_chute is a deterministic UAS flight-termination / parachute-deployment safety controller, delivered as synthesizable SystemVerilog soft-IP with an APB4-lite control interface and built-in ISO 26262 (ASIL-B/D-leaning) safety instrumentation.

Key Features

Four arbitrated trigger sources — heartbeat-loss, manual terminate, envelope fault, redundant hardware arm — each independently enableable via TRIGMASK
Arming interlock: termination fires only on ARMED & valid-trigger; a demand while disarmed or a redundant-arm/ARM mismatch raises err_code 3
Heartbeat watchdog forces deploy_o on loss of the flight-controller strobe within HBTIMO clocks, independent of any software command — err_code 4
Deterministic deploy sequence: fixed PULSEW pyro/servo pulse, then irreversibly latched terminated_o and motor_cut_o; config write-locked once terminated
KEEP_ATTR bitwise-complement DMR on the termination FSM and deploy-pulse counter, plus 2-of-3 TMR (voter_2oo3/tmr_reg) on the deploy-decision latch — both report err_code 9
Config-register even parity across CTRL/PULSEW/HBTIMO/TRIGMASK reports err_code 1; all faults sticky (RW1C) in ERR and aggregated to the shared safety_monitor
Catalog FMEDA: SPFM 93.85%, LFM 91.42%, PMHF 9.27×10⁻¹⁰/h — PASS against ASIL-B, ASIL-D-leaning design intent

Standards & Compliance

ASTM F3322 (UAS parachute systems); ISO 26262 ASIL-B SEooC, gated (SPFM 93.85%, LFM 91.42%, PMHF 9.27×10⁻¹⁰/h)

Functional Safety

ASIL-B (SEooC) · SPFM 93.85% · LFM 91.42% · PASS

ISO 26262:2018 · FMEDA available · Safety Manual included

Register Map

Offset	Register	Description
`0x00`	CTRL	[0]=ARM [1]=EN (even-parity protected with the threshold/timeout regs)
`0x04`	STATUS	[0]=TERMINATED [1]=DEPLOY [2]=MOTOR_CUT [3]=ARMED [4]=HB_OK [5]=FAULT
`0x08`	PULSEW	deploy pulse width in clocks (pyro/servo fire duration)
`0x0C`	HBTIMO	heartbeat timeout in clocks (no strobe within window -> terminate)
`0x10`	TRIGMASK	[0]=HB_EN [1]=MANUAL_EN [2]=ENV_EN [3]=RARM_REQ (redundant-arm required)

…1 more registers — see datasheet for the full table.

Getting Started

// Minimal instantiation
safety_chute #(
 .ADDR_W(6)
) u_safety_chute (
 .clk (clk),
 .rst_n (rst_n),
 // APB4
 .p_paddr (paddr),
 .p_psel (psel),
 .p_penable (penable),
 .p_pwrite (pwrite),
 .p_pwdata (pwdata),
 .p_prdata (prdata),
 .p_pready (pready),
 // Safety
 .err_clear (1'b0),
 .err_valid (err_valid),
 .err_code (err_code)
);

Configure via the CTRL register after reset to enable the IP and set operating parameters. Monitor err_valid / err_code for any safety faults reported by the built-in safety monitor.

Applications

Where it fits

Typically deployed in UAV flight controllers and robotics platforms operating under a functional-safety mandate.

The case

Why license it, not build it

Skip 12–18 months

The FMEDA and the safety case are already generated. You integrate a finished safety element — you don’t stand up a safety-IP program to originate one.

One vendor, one safety story

Every block in the catalog shares the same safety architecture, fault-reaction model, and FMEDA methodology — so subsystems roll up cleanly.

Verified, not vapor

The RTL builds and passes today; the safety metrics come from analysis and fault injection against real RTL, not a datasheet promise.

Interested in safety_chute — UAS Flight-Termination / Parachute Controller?

Pricing, the per-IP FMEDA, safety manual, and RTL data room are shared under a mutual NDA.

Talk to us →See related IP

Figures are pre-silicon engineering-grade estimates for a Safety Element out of Context (SEooC); final ASIL sign-off is the integrator’s, supported under NDA. FMEDA and Safety Manual available under NDA.

circuit-design.space · +1-971-357-1400 · anovickis@circuit-design.space