
The operator-side freshness watchdog for a teleoperated command/video link — catches the stale, frozen, dropped… It is delivered as a licensable soft-IP block engineered as an ASIL-B Safety Element out of Context — not just RTL, but the complete functional-safety work package needed to carry it into an ISO 26262 program:
teleop_link_guard is the operator/decoder-side freshness watchdog for a teleoperated video link, delivered as synthesizable SystemVerilog soft-IP with an APB4-lite control interface and built-in ISO 26262 (ASIL-B) safety instrumentation.
safe\_state\_o: L1 staleness/glass-to-glass latency, L2 a diverse time-sync-free no-frame timeout, L3 sequence-gap/drop/reorder detection, L4 decoded-side freeze detection (N identical frame hashes)err\_code 9 instead of silently blinding the guardsafe\_state\_o is the safety function (→ minimal-risk maneuver); err\_valid/err\_code is a distinct guard-integrity alarm (config parity → err\_code 1, safe-state/detection DMR → err\_code 9)safe\_state\_o and err\_valid into an fccu fault hub via spare ext\_fault\_i lines (sources 11/12) alongside safe\_video‘s frame-integrity alarm (source 10), with per-source fault\_id\_o reporting and zero safety\_island RTL changesISO 26262 ASIL-B SEooC (pre-sign-off, D4 gate-level measured: SPFM 99.65%, LFM 91.31%, PMHF 0/h); AMBA APB4-lite control/status; IEEE 802.1AS time-sync (AoU for the latency check); Technology Preview — digital-only, silicon validation pending, FMEDA informational
ASIL-B target (SEooC) · SPFM 99.65% · LFM 91.31% · Informational — not gated
Informational FMEDA — this IP is reported but NOT gated. The SPFM/LFM figures above are engineering estimates from a model that is not held to the ASIL metric gates (QM, safety-by-composition, a vendor-core overlay, or a pre-sign-off Technology Preview, depending on the IP). They are not a certification claim and must not be relied on as one. See the safety manual for this IP’s exact status, assumptions of use, and any open items.
ISO 26262:2018 · FMEDA available · Safety Manual included
| Offset | Register | Description |
|---|---|---|
0x00 | CTRL | RW [0]=EN, [1]=SEQ_CHK, [2]=FRZ_CHK, [3]=LAT_CHK |
0x04 | LAT_BUDGET | RW [31:0] max glass-to-glass latency / staleness age (time-base units; 0=off) |
0x08 | FRAME_TO | RW [31:0] max cycles between decoded frames (no-frame watchdog; 0=off) |
0x0C | FRZ_N | RW [7:0] freeze threshold (consecutive identical frame hashes) |
0x10 | STATUS | RO [0]=STALE, [1]=NOFRAME, [2]=SEQGAP, [3]=FREEZE, [4]=SAFE_STATE, [5]=ERR_VALID, [9:6]=ERR_CODE |
…3 more registers — see datasheet for the full table.
// Minimal instantiation
teleop_link_guard #(
.ADDR_W(6)
) u_teleop_link_guard (
.clk (clk),
.rst_n (rst_n),
// APB4
.p_paddr (paddr),
.p_psel (psel),
.p_penable (penable),
.p_pwrite (pwrite),
.p_pwdata (pwdata),
.p_prdata (prdata),
.p_pready (pready),
// Safety
.err_clear (1'b0),
.err_valid (err_valid),
.err_code (err_code)
);Configure via the CTRL register after reset to enable the IP and set operating parameters. Monitor err_valid / err_code for any safety faults reported by the built-in safety monitor.
Typically deployed in UAV flight controllers and robotics platforms operating under a functional-safety mandate.
Pricing, the per-IP FMEDA, safety manual, and RTL data room are shared under a mutual NDA.
Figures are pre-silicon engineering-grade estimates for a Safety Element out of Context (SEooC); final ASIL sign-off is the integrator’s, supported under NDA. FMEDA and Safety Manual available under NDA.
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