AI Inference & Acceleration

Tensor-Layout-Aware Data Mover

tensordma is a tensor-layout-aware data mover (A-3) delivered as synthesizable SystemVerilog soft-IP with an APB4-lite control interface and built-in…

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ASIL-B

target

96.40%

SPFM

100.00%

LFM

PASS

FMEDA

1.3K

gates

1.0.0

version

The deliverable

What you’re licensing

tensordma is a tensor-layout-aware data mover (A-3) delivered as synthesizable SystemVerilog soft-IP with an APB4-lite control interface and built-in… It is delivered as a licensable soft-IP block engineered as an ASIL-B Safety Element out of Context — not just RTL, but the complete functional-safety work package needed to carry it into an ISO 26262 program:

Synthesizable RTL

Portable, vendor-neutral SystemVerilog that drops onto your existing SoC fabric — no foundry or EDA-tool lock-in.

Per-IP FMEDA report

SPFM / LFM / PMHF computed against the ASIL target per ISO 26262-5 — the quantitative analysis your assessor asks for.

Safety manual

Assumptions of use, the safety mechanisms and their diagnostic coverage — written to drop straight into your safety case.

IP-XACT + integration docs

A machine-readable descriptor plus register and integration documentation for fast, low-risk bring-up.

Self-checking testbench

A self-checking (crypto: bit-exact) testbench and a one-command build, so you can reproduce every claim on day one.

What it is

tensor_dma is a tensor-layout-aware data mover (#A-3) delivered as synthesizable SystemVerilog soft-IP with an APB4-lite control interface and built-in ISO 26262 (ASIL-B) safety instrumentation.

Key Features

im2col / tiling address generation (BASE + col*STRIDE + tap)
AXI4 burst-read front-end + AXI4-Stream master output (tuser/tlast framing)
On-the-fly INT8 quant/dequant with QEN passthrough
Config-register parity (err_code 1) + SECDED line buffer (err_code 2)
Diverse-DMR im2col addr-gen FSM (err_code 9); FMEDA SPFM 93.9% ASIL-B PASS

Standards & Compliance

ISO 26262 (ASIL-B), INT8 quantization per TFLite / ONNX Runtime

Functional Safety

ASIL-B (SEooC) · SPFM 96.40% · LFM 100.00% · PASS

ISO 26262:2018 · FMEDA available · Safety Manual included

Register Map

Offset	Register	Description
`0x00`	BASE	RW [ADDR_W-1:0] TCM word base address of the input feature map
`0x04`	IN_LEN	RW number of input words (feature-map length)
`0x08`	KW	RW [7:0] im2col window width (taps per output column)
`0x0C`	STRIDE	RW [7:0] im2col stride (in words)
`0x10`	QUANT	RW [7:0]=ZP(int8 zero-point) [15:8]=SCALE [19:16]=SHIFT

…3 more registers — see datasheet for the full table.

Getting Started

// Minimal instantiation
tensor_dma #(
  .ADDR_W(6)
) u_tensor_dma (
  .clk       (clk),
  .rst_n     (rst_n),
  // APB4
  .p_paddr   (paddr),
  .p_psel    (psel),
  .p_penable (penable),
  .p_pwrite  (pwrite),
  .p_pwdata  (pwdata),
  .p_prdata  (prdata),
  .p_pready  (pready),
  // Safety
  .err_clear (1'b0),
  .err_valid (err_valid),
  .err_code  (err_code)
);

Configure via the CTRL register after reset to enable the IP and set operating parameters. Monitor err_valid / err_code for any safety faults reported by the built-in safety monitor.

Applications

Where it fits

Typically deployed in safety-critical edge inference — ADAS, autonomous robotics, and machine vision.

The case

Why license it, not build it

Skip 12–18 months

The FMEDA and the safety case are already generated. You integrate a finished safety element — you don’t stand up a safety-IP program to originate one.

One vendor, one safety story

Every block in the catalog shares the same safety architecture, fault-reaction model, and FMEDA methodology — so subsystems roll up cleanly.

Verified, not vapor

The RTL builds and passes today; the safety metrics come from analysis and fault injection against real RTL, not a datasheet promise.

Interested in Tensor-Layout-Aware Data Mover?

Pricing, the per-IP FMEDA, safety manual, and RTL data room are shared under a mutual NDA.

Talk to us →See related IP

Figures are pre-silicon engineering-grade estimates for a Safety Element out of Context (SEooC); final ASIL sign-off is the integrator’s, supported under NDA. FMEDA and Safety Manual available under NDA.

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