Free tool
Buck Converter Design Calculator
Enter the operating point. The calculator returns the inductor, the output capacitance needed for ripple and for a load step, and the input capacitor RMS current — without steering you toward anybody's part number.
| Inductor peak current | |
| Inductor RMS current | |
| Output cap needed for ripple alone | |
| Output cap needed for the load step | |
| Input capacitor RMS current | |
| Ripple contributed by ESR alone | |
Runs entirely in your browser. Nothing is uploaded, stored, or sent anywhere.
Why a vendor-neutral one
Every silicon vendor publishes a buck calculator, and every one of them ends at a part number in
their own catalogue. That is a reasonable thing for them to do and an unhelpful place to start from
if you are still deciding what the converter needs to be. The arithmetic below is the same
arithmetic in all of them, with nothing steering the answer.
The equations
D = Vout / Vin ·
ΔIL = ratio × Iout
L = Vout(1 − D) / (fsw · ΔIL)
Ipk = Iout + ΔIL/2 ·
Irms = √(Iout² + ΔIL²/12)
Cripple = ΔIL / (8 fsw (ΔV − ΔIL·ESR))
Cstep = ΔIstep² · L / (2 · Vdroop · (Vin − Vout))
ICin,rms = Iout √(D(1 − D))
The three things this tool is really for
- The ripple ratio is a choice, not a constant. Thirty percent is a convention,
not a law. Lower ripple means a bigger, costlier inductor and lower AC losses; higher ripple means a
smaller part, worse efficiency, and an earlier slide into discontinuous conduction at light load.
Move the slider and watch the inductor size trade against the peak current rating.
- ESR often sets the ripple, not capacitance. The table shows what the ESR alone
contributes. If that already eats your budget, adding capacitance changes nothing — a fact
that is obvious in the equation and routinely missed on a schematic. The tool refuses to give you a
capacitance in that case and says why.
- Load steps usually size the output capacitor. Compare the two capacitance rows.
On most designs the transient requirement is several times the ripple requirement, so a converter
sized only for ripple looks fine on a bench with a static load and droops in the application.
What this does not do
This sizes power-stage components. It is not a converter design.
The control loop, the thermal design and the layout are where buck converters actually fail.
- No loop compensation. Stability depends on the modulator, the output filter and
the compensator together. A converter with correctly sized parts and a badly compensated loop
oscillates.
- No losses or thermals. Conduction, switching, gate-drive and core losses set
efficiency and junction temperature, and they need real part data.
- Ideal duty cycle. The real duty cycle is higher once diode, switch and
inductor-resistance drops are included, which matters most near dropout.
- No ceramic derating. Class II ceramics lose a large fraction of rated
capacitance under DC bias. A 22 µF part at its rated voltage may deliver a third of that
— size against the biased value, not the marking.
- Layout is absent and it dominates. The high-di/dt loop from input capacitor
through switch to ground decides EMI and ringing. That is a placement decision no calculator
reaches, and it is the most common reason a correctly specified converter misbehaves.
Where this fits
Board-level analog and digital design is our primary service line — power supplies,
analog front-ends, clocking and the layout that decides whether any of it works. If a rail is
misbehaving on hardware that already exists, that is a board design review or a failure-analysis
engagement; if it is still on paper, the cheapest intervention is a design review before layout.
More free tools
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