Enter your decoupling banks. The calculator plots the bank impedance across frequency and finds the anti-resonant peaks between the capacitor self-resonances — the ones a flat count-the-capacitors estimate cannot see.
| Qty | Value (µF) | Mounted ESL (nH) | ESR (mΩ) | Self-resonance |
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Almost every quick decoupling estimate — including the one on our own PDN target impedance page — treats a capacitor bank as a resistance and an inductance in parallel and asks how many parts it takes to get under a target. That model is useful, and it is blind to the thing that most often makes a real board miss its target: anti-resonance.
Every capacitor is a series RLC. Below its self-resonant frequency it behaves capacitively; above it, inductively. Put two different values side by side and there is a frequency between their resonances where one is already inductive and the other is still capacitive. The inductive one and the capacitive one form a parallel resonant tank, and a parallel tank has high impedance. The bank gets worse at that frequency than either bank alone would have been.
The example loaded above is a design that looks safe by every flat measure. Four bulk capacitors and a hundred small ones, low ESR throughout, and an impedance under 3 mΩ across most of the band — a count-the-capacitors estimate would sign it off without comment. It has a 20 mΩ spike at 2.3 MHz, twice the target, because the two banks sit two full decades apart with nothing in between. Press Fix it: add the mid-band value and the peak drops by about a factor of three, from one added component value. Press Single value only to see the opposite failure: no peak at all, and a hopeless impedance below a megahertz.
Zbank(f) = ESR/n + j( 2πf · ESL/n − 1/(2πf · nC) )Ztotal(f) = 1 / Σ ( 1 / Zbank(f) ) — complex admittances, summedfSRF = 1 / (2π √(ESL · C))The admittances are summed as complex numbers, which is the whole point: adding magnitudes would average the peaks away and reproduce exactly the misleading answer the flat model gives. Each bank of n identical parts divides its ESR and ESL by n and multiplies its capacitance by n.
Signal and power integrity is one of our primary service lines — pre-layout constraints through post-layout verification in Ansys SIwave and Siemens HyperLynx, which model the planes, the positions and the VRM that this page deliberately cannot. A PDN and decoupling review runs about a week to a fixed scope and ends in a written report you keep.
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