Crystal Load Capacitance and Startup Margin Calculator

Free tool

Crystal Load Capacitance and Startup Margin Calculator

Enter the crystal’s specified load capacitance, ESR and shunt capacitance, and your oscillator’s transconductance. The calculator gives the capacitors to fit, the startup margin against the critical value, and whether you are overdriving the crystal.

C1 = C2
the pair to fit
gm margin
want 5× or better
Critical gm
below this it will not start
Drive level
Effective load seen by the crystal
Frequency pulling if CL is wrong by 1 pF
Nearest E12 capacitor pair

Runs entirely in your browser. Nothing is uploaded, stored, or sent anywhere.

The two failures a crystal circuit has

Crystal oscillators fail in exactly two ways, and both are avoidable at schematic time. Either the oscillator does not have enough gain to start — which shows up as an intermittent cold-start fault months later, in the field, on some units and not others — or it has far too much and overdrives the crystal, which ages it and shifts its frequency permanently. Neither is visible on a working prototype at room temperature.

Load capacitance, and why the strays matter

CL = (C1 · C2)/(C1 + C2) + Cstray, so with C1 = C2 = C:  C = 2 × (CL − Cstray)

A crystal is specified to be on frequency only when it sees a particular load capacitance. Give it something else and it runs fast or slow — a parallel-resonant crystal with too little load runs high, and the error is typically tens of parts per million, which is enough to break a UART link or fail a radio’s frequency accuracy requirement.

The trap is that Cstray is not small. Pad, track and pin capacitance is commonly 3–5 pF per side, and it subtracts directly from the capacitors you fit. For a crystal specified at 8 pF with 3 pF of stray, the correct capacitors are 10 pF, not 16 pF — fitting 16 pF puts the load at 11 pF and the oscillator well off frequency. The tool also shows the pulling sensitivity in ppm per pF so you can see how much precision the layout actually needs.

Startup margin is the specification nobody checks

gm,crit = 4 · ESR · (2πf)² · (C0 + CL  ·  margin = gm / gm,crit, want ≥ 5

The oscillator has to supply enough negative resistance to overcome the crystal’s ESR and the losses in the load capacitors. The critical transconductance above is the point at which oscillation is exactly sustained — the boundary, not a working condition. Standard practice is to require at least 5× that, because the worst case is not the crystal you measured: it is a worst-case ESR unit at cold temperature with a weak supply, starting from noise.

Three things make margin worse, and all of them are tempting. Larger load capacitors, because gm,crit goes with the square of the total capacitance. Higher frequency, also squared. And a physically smaller crystal, because miniature packages have markedly higher ESR — a 3.2×2.5 mm part can have several times the ESR of a 5×3.2 mm one at the same frequency. Shrinking the crystal is the most common cause of a startup problem that appeared “for no reason” on a board respin.

Drive level, and the series resistor

Too much drive is the opposite failure. Excess power ages the quartz, drives frequency permanently off, and in severe cases fractures it. The standard fix is a series resistor at the oscillator’s drive pin, which limits current without affecting the load capacitance the crystal sees. It costs one component and it is far easier to fit at design time than to retrofit.

Note the tension: reducing the load capacitors improves startup margin, and increasing them reduces drive. The two constraints pull in opposite directions, which is precisely why both belong in the same calculation rather than being checked separately.

Estimates, not measurements. Drive level here uses an assumed oscillation amplitude, because the real amplitude depends on the oscillator’s internal limiting. The reliable method is measurement: a high-impedance active probe, or the series-resistor substitution method, on real hardware at temperature extremes. Motional capacitance is assumed at a typical 7 fF for the pulling figure; use your crystal’s actual value if you have it.

What to check on hardware

  • Start at cold, from a slow supply ramp, on several units. Startup failures are statistical and temperature-dependent, and a single warm bench test proves nothing.
  • Measure frequency with the real load, not with a probe hanging on the pin — a 10 pF probe is a large fraction of the load capacitance and will pull the answer.
  • Keep the loop tight. The crystal, both capacitors and their ground return want to be as small a loop as possible, with a guard fill and no other signals crossing underneath. Layout is not a detail here; it is part of the capacitance budget.

More free tools

Each of these runs entirely in your browser. Nothing is uploaded, stored or sent anywhere, and none of them needs an email address.

See all 26 engineering tools →