AMBA / On-Chip Bus

APB5 / APB4 / APB3 / APB2

A house-built UVM agent for the APB4 register-configuration bus that every catalog IP’s control/status interface speaks — the same driver this repo’s own uvm_i2c_master and other per-IP UVM…

Request this VIP →Browse all VIP

shippingGroup AMBA / On-Chip BusStandard ARM AMBA APB v2.0 (APB4), AMBA 5 APB, AMBA 2/3 APB

Available now — real, tested verification collateral, not a roadmap placeholder.

Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.

The deliverable

What you get

Bus-functional model

An independent driver for the protocol, written clean-room from the public specification — not derived from our own RTL, so it is a genuine second source.

Passive protocol checker

A monitor that watches the bus and asserts the spec’s rules continuously, so a violation fails the run where it happens rather than downstream.

Self-checking interop testbench

A one-command testbench that drives the model against real RTL and hard-checks the result — reproduce every claim on day one.

A house-built UVM agent for the APB4 register-configuration bus that every catalog IP’s control/status interface speaks — the same driver this repo’s own uvm_i2c_master and other per-IP UVM testbenches instantiate. Implements the standard 2-phase SETUP→ACCESS cycle with independent active (drive) and passive (monitor-only) modes for use on either side of a bridge.

Key Features

Full APB4 SETUP→ACCESS 2-phase cycle: PSEL/PENABLE/PWRITE/PADDR/PWDATA/PRDATA/PREADY/PSLVERR
UVM driver + monitor + sequencer, packaged as a single reusable apb4_agent
is_active = UVM_ACTIVE (drive) or UVM_PASSIVE (observe-only, e.g. slave side of a bridge)
Analysis-port transaction broadcast for scoreboard/coverage hookup

Standards & Compliance

ARM AMBA APB v2.0 (APB4), AMBA 5 APB, AMBA 2/3 APB

Pairs With

Built to lean against these catalog IPs during integration:

Interested in the APB5 / APB4 / APB3 / APB2 VIP?

Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.

Talk to us →See related VIP

Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.

circuit-design.space · +1-971-357-1400 · sales@circuit-design.space