← Safety Soft-IP
Verification IP · BFM · Protocol Checker · UVM Agent

139 protocol VIPs to verify against

Independent, clean-room verification collateral for the protocols this catalog’s safety IP speaks — and for any design that speaks them. Written from the public specifications, never derived from our own RTL, so a VIP is a genuine second source rather than a copy of the design’s own assumptions.

Talk to us →Safety Soft-IP catalog

Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.

139
protocol VIPs
across 16 groups
45
shipping today
real, tested collateral
clean-room
second source
written from the spec
interop TB
self-checking
one command to reproduce
not rated
no ASIL / FMEDA
testbench collateral
The deliverable

What a VIP is

Bus-functional model
An independent driver for the protocol, written clean-room from the public specification — not derived from our own RTL, so it is a genuine second source.
Passive protocol checker
A monitor that watches the bus and asserts the spec’s rules continuously, so a violation fails the run where it happens rather than downstream.
Self-checking interop testbench
A one-command testbench that drives the model against real RTL and hard-checks the result — reproduce every claim on day one.
Second-source independence

Why an independent model

A testbench built from the same assumptions as the design cannot find the assumptions that are wrong. Every VIP here is written clean-room from the public standard, so it disagrees with the design when the design is wrong. Run against our own can_fd, the CAN checker surfaced a real bit-stuffing gap — since fixed and formally closed.

139 VIP shown

AMBA / On-Chip Bus

15 VIP · 10 shipping
ACE4 / ACE4-Liteplanned
ARM AMBA 4 ACE
AMBA / On-Chip Bus
AHB5 / AHB3-Liteshipping
ARM AMBA 5 AHB / AMBA 3 AHB-Lite
AMBA / On-Chip Bus
APB5 / APB4 / APB3 / APB2shipping
ARM AMBA APB v2.0 (APB4), AMBA 5 APB, AMBA 2/3 APB
AMBA / On-Chip Bus
ATB 5/4/3planned
ARM AMBA 5/4/3 Trace Bus (ATB)
AMBA / On-Chip Bus
AXI4 / AXI4-Lite / AXI3shipping
ARM AMBA AXI4 / AXI4-Lite / AXI3
AMBA / On-Chip Bus
AXI4-Stream / AXI5-Streamshipping
ARM AMBA AXI4-Stream / AXI5-Stream
AMBA / On-Chip Bus
CHI 5 (Issue E)shipping
ARM AMBA 5 CHI (Issue E)
AMBA / On-Chip Bus
CXS a/bplanned
Arm CHI-CXS (Chip-to-Chip Extension) — CXS-A/CXS-B layers
AMBA / On-Chip Bus
CXS c/d/Liteplanned
Arm CHI-CXS (Chip-to-Chip Extension) — CXS-C/D/Lite layers
AMBA / On-Chip Bus
JTAG / cJTAGshipping
IEEE 1149.1, IEEE 1149.7 (cJTAG), RISC-V Debug Spec
AMBA / On-Chip Bus
NoC / Multi-Protocol Fabricshipping
Multi-protocol (AHB / AXI / APB / TileLink) fabric-level
AMBA / On-Chip Bus
OBI (Open Bus Interface)shipping
OBI v1.5
AMBA / On-Chip Bus
PLIC / CLIC / CLINTshipping
RISC-V Privileged Spec (Platform-Level Interrupt Controller)
AMBA / On-Chip Bus
SWD (Serial Wire Debug)planned
ARM Serial Wire Debug (SWD), ADIv5/ADIv6
AMBA / On-Chip Bus
TileLink (TL-UL)shipping
TileLink (SiFive), Uncached Lightweight conformance level
AMBA / On-Chip Bus

Ethernet / Networking

14 VIP · 4 shipping
100G/40G Ethernetplanned
IEEE 802.3ba/bj/bm (100GbE), 802.3ba (40GbE)
Ethernet / Networking
100M Ethernetshipping
IEEE 802.3bw (100BASE-T1)
Ethernet / Networking
10G/5G Ethernetplanned
IEEE 802.3ae (10GbE), 802.3bz (5GBASE-T)
Ethernet / Networking
10M Ethernetshipping
IEEE 802.3cg (10BASE-T1S, incl. PLCA)
Ethernet / Networking
1600G Ethernetplanned
IEEE 802.3 1600GbE (in development)
Ethernet / Networking
1G BASE-Tshipping
IEEE 802.3ab (1000BASE-T) — MAC-frame + MDIO layer only
Ethernet / Networking
1G/2.5G Ethernetshipping
IEEE 802.3bz (2.5GBASE-T) — MAC-frame + MDIO layer only
Ethernet / Networking
400G/200G Ethernetplanned
IEEE 802.3bs (400GbE), 802.3bs/cn (200GbE)
Ethernet / Networking
50G/25G Ethernetplanned
IEEE 802.3cd (50GbE), 802.3by (25GbE)
Ethernet / Networking
800G Ethernetplanned
IEEE 802.3df (800GbE)
Ethernet / Networking
Interlaken v1.2planned
Interlaken Alliance Interlaken Protocol Definition v1.2
Ethernet / Networking
IPsecplanned
IETF RFC 4301-4309 (IPsec: AH, ESP, IKEv2)
Ethernet / Networking
TCP / TCP Offloadplanned
IETF RFC 793 (TCP) + hardware TCP-offload-engine conventions
Ethernet / Networking
Ultra Ethernet (UEC)planned
Ultra Ethernet Consortium (UEC) Specification
Ethernet / Networking

USB

14 VIP · 2 shipping
128b/132bplanned
128b/132b line coding (USB4 / PCIe Gen6+)
USB
eUSB2 v1planned
USB-IF eUSB2 Specification v1
USB
eUSB2 v2planned
USB-IF eUSB2 Specification v2
USB
Retimer 4.0/3.2planned
USB4 / USB 3.2 Retimer requirements
USB
Type-C v1.3planned
USB-IF USB Type-C Cable and Connector Specification v1.3
USB
UAS (USB Attached SCSI)planned
USB Attached SCSI Protocol (UASP)
USB
USB 2.0shipping
USB 2.0 Specification, ULPI 1.1
USB
USB 3.2/3.1/3.0planned
USB-IF USB 3.2 Specification (back-compat 3.1/3.0)
USB
USB 4/3/2 Hubplanned
USB-IF Hub Class Specification (USB 2.0/3.x/4)
USB
USB PD v3.1planned
USB-IF USB Power Delivery Specification v3.1
USB
USB2 OTGshipping
USB On-The-Go and Embedded Host Supplement
USB
USB4 0planned
USB-IF USB4 Specification
USB
USB4 v2planned
USB-IF USB4 Specification v2
USB
xHCIplanned
Intel eXtensible Host Controller Interface (xHCI) Specification
USB

Automotive Networking

13 VIP · 9 shipping
ASA (Automotive SerDes Alliance)planned
ASA Motion Link Specification
Automotive Networking
Automotive Ethernetshipping
IEEE 802.3 (single-pair automotive PHY variants: 10BASE-T1S/100BASE-T1/1000BASE-T1)
Automotive Networking
CAN / CAN FDshipping
Bosch CAN 2.0 A/B, CAN FD (Bosch spec + ISO 11898-1)
Automotive Networking
CAN XLshipping
CiA 610-1, ISO 11898-1:2024 (CAN XL extensions)
Automotive Networking
CXPIplanned
JASO D 015 Clock Extension Peripheral Interface (CXPI)
Automotive Networking
FlexRayshipping
ISO 17458 (FlexRay Communications System)
Automotive Networking
MACsecplanned
IEEE 802.1AE (MACsec)
Automotive Networking
Preemption / PFCplanned
IEEE 802.3br (frame preemption), IEEE 802.1Qbb (Priority Flow Control)
Automotive Networking
PTP / gPTPshipping
IEEE 1588 (PTP), 802.1AS (gPTP)
Automotive Networking
QBV (Scheduled Traffic)shipping
IEEE 802.1Qbv (Time-Aware Shaper)
Automotive Networking
SENT / LINshipping
SAE J2716 (SENT), LIN 2.x
Automotive Networking
TSN (Time-Sensitive Networking)shipping
IEEE 802.1 TSN task-group standards, 802.1AS (gPTP), 802.1AE (MACsec)
Automotive Networking
TSN Queuing & Forwardingshipping
IEEE 802.1Qci (per-stream filtering), 802.1Qbu (frame preemption)
Automotive Networking

Memory

13 VIP · 0 shipping
DDR5 LRDIMMplanned
JEDEC DDR5 LRDIMM (Load-Reduced DIMM)
Memory
DDR5 MRDIMM2planned
JEDEC DDR5 MRDIMM (Multiplexed-Rank DIMM), 2nd generation
Memory
DDR5 RDIMMplanned
JEDEC DDR5 RDIMM (JESD82-511)
Memory
DDR5/4/3planned
JEDEC DDR5 (JESD79-5), DDR4 (JESD79-4), DDR3 (JESD79-3)
Memory
DDR6planned
JEDEC DDR6 (in development)
Memory
GDDR6planned
JEDEC GDDR6 (JESD250)
Memory
GDDR7planned
JEDEC GDDR7 (JESD239)
Memory
HBM3E/3/2planned
JEDEC HBM3E / HBM3 / HBM2 (JESD238/JESD235)
Memory
HBM4planned
JEDEC HBM4 (in development)
Memory
HMC (Hybrid Memory Cube)planned
Hybrid Memory Cube Consortium HMC Specification
Memory
LPDDR4x/4/3planned
JEDEC LPDDR4 (JESD209-4), LPDDR3 (JESD209-3)
Memory
LPDDR5 / 5Xplanned
JEDEC LPDDR5 / LPDDR5X (JESD209-5)
Memory
LPDDR6planned
JEDEC LPDDR6 (in development)
Memory

PCIe / CXL

10 VIP · 0 shipping
ATS (Address Translation Services)planned
PCI-SIG Address Translation Services (ATS) Specification
PCIe / CXL
CXL 4.0/3.2/3/2planned
Compute Express Link (CXL) Specification 4.0/3.2/3.x/2.x
PCIe / CXL
CXL Switchplanned
Compute Express Link (CXL) Switch Specification
PCIe / CXL
PCIe Gen 3/2planned
PCI-SIG PCI Express Base Specification, Gen 3 (8 GT/s) / Gen 2 (5 GT/s)
PCIe / CXL
PCIe Gen 5/4planned
PCI-SIG PCI Express Base Specification, Gen 5 (32 GT/s) / Gen 4 (16 GT/s)
PCIe / CXL
PCIe Gen 6planned
PCI-SIG PCI Express Base Specification, Gen 6 (64 GT/s, PAM4 + FLIT mode)
PCIe / CXL
PCIe Gen 7planned
PCI-SIG PCI Express Base Specification, Gen 7 (128 GT/s, PAM4)
PCIe / CXL
PCIe Switchplanned
PCI-SIG PCI Express Base Specification (switch/bridge behavior)
PCIe / CXL
PIPE 6/5planned
PCI-SIG PHY Interface for PCI Express (PIPE) Specification, 6.x/5.x
PCIe / CXL
SR-IOVplanned
PCI-SIG Single Root I/O Virtualization and Sharing (SR-IOV) Specification
PCIe / CXL

Serial & Control Bus

10 VIP · 5 shipping
AVSBus v2.0/1.4.1planned
Adaptive Voltage Scaling Bus (AVSBus) Specification v2.0/1.4.1
Serial & Control Bus
I2C / I2S / LPCshipping
NXP UM10204 I2C-Bus Specification
Serial & Control Bus
I3C (SDR)shipping
MIPI I3C-Bus Specification v1.1.1 (SDR-private subset)
Serial & Control Bus
PMBus v1.5/1.4planned
Power Management Bus (PMBus) Specification v1.5/1.4
Serial & Control Bus
SMBus v3.3.1/3.2planned
System Management Bus (SMBus) Specification v3.3.1/3.2
Serial & Control Bus
SPI / QSPI / OSPIshipping
De facto flash-vendor conventions (Motorola/Macronix/Winbond/Micron/Samsung)
Serial & Control Bus
SPMIplanned
MIPI System Power Management Interface (SPMI)
Serial & Control Bus
SWI3S v1.0planned
Single-Wire Interface for Sensors (SWI3S) v1.0
Serial & Control Bus
UART / USARTshipping
Modeled on the National Semiconductor PC16550D UART/USART
Serial & Control Bus
xSPI (expanded SPI)shipping
JEDEC JESD251A (xSPI) + JESD216D-01 (SFDP)
Serial & Control Bus

Camera & Display PHY (MIPI)

9 VIP · 3 shipping
A-PHY / PALplanned
MIPI A-PHY (long-reach automotive SerDes) + PHY Adapter Layer (PAL)
Camera & Display PHY (MIPI)
C-PHY v2.1planned
MIPI C-PHY v2.1
Camera & Display PHY (MIPI)
CSI-2 v4.0.1shipping
MIPI CSI-2 v4.0.1
Camera & Display PHY (MIPI)
D-PHY v3.5shipping
MIPI D-PHY v3.5
Camera & Display PHY (MIPI)
DSI v1.3.2shipping
MIPI DSI v1.3.2
Camera & Display PHY (MIPI)
DSI v2.2planned
MIPI DSI-2 v2.2
Camera & Display PHY (MIPI)
M-PHY v5.0planned
MIPI M-PHY v5.0
Camera & Display PHY (MIPI)
MASSplanned
MIPI MASS (Multimedia Advanced Security Specification)
Camera & Display PHY (MIPI)
UniPro v2.0planned
MIPI UniPro v2.0
Camera & Display PHY (MIPI)

Display

9 VIP · 0 shipping
DisplayPort 2.0/1.4planned
VESA DisplayPort 2.0 / 1.4
Display
DisplayPort 2.1planned
VESA DisplayPort 2.1
Display
DisplayPort AE 1.0planned
VESA DisplayPort Alt Mode / Adaptive-Eye (AE) extensions
Display
eDP 1.5/1.4bplanned
VESA Embedded DisplayPort (eDP) 1.5 / 1.4b
Display
eDP 2.0planned
VESA Embedded DisplayPort (eDP) 2.0
Display
HDCP 2.4/2.3/1.4planned
Digital Content Protection LLC HDCP 2.4/2.3/1.4
Display
HDMI 2.1/2.0/1.4planned
HDMI Forum HDMI Specification 2.1 / 2.0 / 1.4
Display
LTTPR / MSTplanned
VESA DisplayPort LTTPR (Link Training Tunable PHY Repeater) + MST
Display
LVDSplanned
ANSI/TIA/EIA-644 (LVDS electrical), JEIDA/VESA LVDS display mapping
Display

Storage

9 VIP · 3 shipping
eMMC v5.1ashipping
JEDEC JESD84-B51 (eMMC 5.1) — command/response + block-data layer only
Storage
NVMe 2.0/1.4planned
NVM Express Base Specification 2.0 / 1.4
Storage
NVMe 2.2planned
NVM Express Base Specification 2.2
Storage
ONFI 5.2planned
Open NAND Flash Interface (ONFI) 5.2
Storage
SATA 3.3planned
SATA-IO Serial ATA Revision 3.3
Storage
SD Express / SD9.1planned
SD Association SD Express (SD 9.1 Physical Layer)
Storage
SDIO / SDHC / UHSshipping
SD Physical Layer Specification (command/response + block-data layer)
Storage
SDUC / SDXCshipping
SD Physical Layer Specification (Ultra Capacity extensions) — command/response + block-data layer only
Storage
UFS 4/3.1planned
JEDEC Universal Flash Storage (UFS) 4.0 / 3.1
Storage

Aerospace & Mil/Avionics

5 VIP · 3 shipping
ARINC 429shipping
ARINC 429 (Mark 33 Digital Information Transfer System)
Aerospace & Mil/Avionics
ARINC 708Aplanned
ARINC 708A Specification (Weather Radar)
Aerospace & Mil/Avionics
MIL-STD-1553shipping
MIL-STD-1553B
Aerospace & Mil/Avionics
SMPTE SDIplanned
SMPTE ST 259/292/424 (Serial Digital Interface)
Aerospace & Mil/Avionics
SpaceWireshipping
ECSS-E-ST-50-12C rev 1 (core link layer only)
Aerospace & Mil/Avionics

Cores / On-Chip Infra / Misc

5 VIP · 0 shipping
64b/66bplanned
IEEE 802.3 64b/66b line coding (10GbE+, PCIe Gen3)
Cores / On-Chip Infra / Misc
8b/10bplanned
IBM 8b/10b line coding (widely reused: PCIe Gen1/2, SATA, Fibre Channel, GbE)
Cores / On-Chip Infra / Misc
FPUplanned
IEEE 754 floating-point arithmetic
Cores / On-Chip Infra / Misc
RI5CYplanned
PULP-Platform RI5CY (RISC-V RV32IMC) core conventions
Cores / On-Chip Infra / Misc
UAL (Universal Address Layer)planned
Vendor-defined Universal Address Layer conventions
Cores / On-Chip Infra / Misc

Timers & Peripherals

5 VIP · 5 shipping
GPIOshipping
Generic GPIO verification (no fixed external spec)
Timers & Peripherals
PIT (Programmable Interval Timer)shipping
Generic PIT verification (no fixed external spec)
Timers & Peripherals
PWMshipping
Generic PWM controller verification (no fixed external spec)
Timers & Peripherals
RTCshipping
Generic calendar/alarm RTC verification (no fixed external spec)
Timers & Peripherals
WDTshipping
Generic watchdog-timer verification (no fixed external spec)
Timers & Peripherals

Chiplet / Die-to-Die

4 VIP · 0 shipping
BoW (Bunch of Wires)planned
OCP ODSA Bunch of Wires (BoW) die-to-die PHY
Chiplet / Die-to-Die
UCIe 2.0planned
UCIe Consortium Universal Chiplet Interconnect Express 2.0
Chiplet / Die-to-Die
UCIe 3.0planned
UCIe Consortium Universal Chiplet Interconnect Express 3.0
Chiplet / Die-to-Die
UCIe with Retimerplanned
UCIe Consortium Universal Chiplet Interconnect Express (retimer extension)
Chiplet / Die-to-Die

RF / Telecom Data Links

2 VIP · 1 shipping
CPRI / eCPRIplanned
CPRI Specification, eCPRI (Common Public Radio Interface / Ethernet-based eCPRI)
RF / Telecom Data Links
JESD204D/C/Bshipping
JEDEC JESD204B (link layer)
RF / Telecom Data Links

Smartcard / Contactless

2 VIP · 0 shipping
ISO/IEC 14443planned
ISO/IEC 14443 (Proximity Cards, Type A/B)
Smartcard / Contactless
ISO/IEC 7816planned
ISO/IEC 7816 (Contact Smart Cards)
Smartcard / Contactless

Need a VIP that isn’t shipping yet?

Scoping is done for every entry in this catalog. Tell us the protocol and your timeline — customer demand reorders the wave.

Talk to us →Safety Soft-IP catalog

Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. Entries marked “planned” are specified against the protocol’s public standard but not yet built. Deliverables and licensing terms are shared under a mutual NDA.

circuit-design.space · +1-971-357-1400 · sales@circuit-design.space