Available now — real, tested verification collateral, not a roadmap placeholder.
Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.
Independent SpaceWire link-partner BFM, clean-room from the public ECSS-E-ST-50-12C spec — bit-level Data-Strobe encode/decode, the character-level odd-parity chain, and the ErrorReset→Ready→Started→Connecting→Run link-init handshake, driven against the catalog’s own second, genuinely asynchronous spw_rxclk recovered-clock domain. A passive protocol checker instantiated on each direction of the point-to-point link independently re-derives DS legality and the parity chain purely from the wire, with zero hierarchical peeking into either side’s state. Interop-proven against the catalog’s spacewire link-layer IP: brings the link to Run, exchanges N-Chars with EOP framing in both directions (BFM→DUT confirmed via APB RXCHAR read-back; DUT→BFM decoded independently off the real TX pins), plus a directed illegal-DS-transition injection caught by the checker. Only the core spacewire link-layer IP is covered — spw_router, spacewire_rmap, and spacefibre are not exercised by this BFM and remain roadmap.
spw_rxclk clock domain (not a clk-tied shortcut)ECSS-E-ST-50-12C rev 1 (core link layer only)
Built to lean against these catalog IPs during integration:
Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.
Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.
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