CXPI

An independent clean-room CXPI bus-controller Bus Functional Model — CXPI reuses LIN’s exact physical/byte-framing layer (BREAK + SYNC(0x55) + PID with LIN 2.x P0/P1 protected-identifier parity + 1-8 data bytes + a classic-or-enhanced 1’s-complement-fold checksum, all as 8N1 UART bytes at 16x oversampling), so this BFM’s byte/break serializer primitives are written in the same spirit as this catalog’s own vip-sent-lin LIN node BFM — independently re-coded, not shared code or an instance of it — plus a NEW Selective Wake task layered on top for CXPI’s own NAD/sleep extension. Not derived from cxpi_node‘s own internal RXE/TXE/frame-FSM logic or from its native testbench’s BFM code; only the bit-level TIMING is mirrored from that paired DUT’s own proven-correct C++ interop reference (tb_cxpi_node_interop.cpp‘s bfm_send_byte/bfm_send_break/bfm_send_wake/bfm_recv_byte) and the PID-parity/checksum FORMULAS (public LIN 2.x algorithms, fair game to reimplement independently). WRITE_FRAME/READ_FRAME drive a normal frame to a specific ID in both directions (controller-to-node and node-to-controller, exercising cxpi_node‘s DLC.dir=1/RX and DLC.dir=0/TX response paths respectively), each with deliberate PID-parity- and checksum-corruption arguments for negative testing; SEND_HEADER sends BREAK+SYNC+PID only (for a non-matching-ID, node-must-stay-silent probe that would otherwise block waiting for a response that correctly never arrives); SEND_WAKE drives a generic LIN-style wake pulse; SEND_SEL_WAKE drives a Selective Wake frame targeting any NAD (matching or non-matching, no dedicated task shape needed for either); IDLE holds the bus recessive for the bus-idle sleep-timeout scenario. A passive protocol checker independently reconstructs every frame off the DUT’s real cxpi_rx/cxpi_tx pins with its own from-scratch oversampling/edge-detect, break/wake pulse-width classification, and PID-parity/checksum recomputation (sharing no code or instance with the BFM) — spanning BOTH pins for a single frame decode (CXPI’s slave-only asymmetry means BREAK/SYNC/PID always land on cxpi_rx, while the DATA+CHECKSUM phase can land on either pin depending on frame direction), and using a level-based rather than edge-triggered wait for the node’s own driven response (the DUT can begin replying within a couple of clock cycles of PID completing, comfortably inside the controller’s own still-held PID stop-bit hold, so a fresh edge is not guaranteed after the wait begins — a real race this effort hit and fixed during bring-up). Its rules are deliberately asymmetric, the same division of labor vip-avsbus‘s own checker draws: fields the NODE itself computes (its own TX-direction response checksum, and silence from a non-matching-ID frame) are unconditionally flagged as violations, while request-side fields the CONTROLLER drives and a directed test may deliberately corrupt (PID parity, the checksum over controller-supplied data) are independently recomputed and exposed as facts for the testbench to assert on in context, not auto-flagged. This second-source effort ran clean against cxpi_node: 0 checker violations across an RX-direction and a TX-direction data-frame round trip, a non-matching-ID frame correctly ignored in both directions (including independently confirmed silence on the TX-direction path), a PID-parity-error frame and a checksum-error frame (both err_code 3, independently confirmed corrupted), sleep entry after a bus-idle timeout, a generic wake pulse, a matching-NAD Selective Wake (STATUS.SELWAKE_SEEN sets), a non-matching-NAD Selective Wake (correctly stays asleep, frame still fully checksum-validated), and a local CTRL.WAKE_REQ force-wake, with no false ASIL-B self-check trip (err_code 1/2/9) at any point. Explicitly out of scope, inherited directly from cxpi_node‘s own v1 scope note (a VIP limitation only insofar as the paired DUT itself doesn’t implement these): a PWM lighting-dimming channel, dynamic NAD assignment (ARP-style address negotiation), any CXPI group-addressing/flag-ID mechanism beyond simple NAD match, and exact reconciliation of the NAD/Selective-Wake frame bit-mapping against the licensed JASPAR/JASO D 015 CXPI specification before real silicon integration.

Key Features

• Independent CXPI bus-controller BFM: LIN-derived byte/break/wake serializer primitives (independently re-coded, not shared with the catalog’s own LIN node BFM) timed off the paired DUT’s own proven C++ interop reference — WRITE_FRAME/READ_FRAME for both frame directions with deliberate PID-parity/checksum-corruption arguments, SEND_HEADER for a header-only silence probe, SEND_WAKE, SEND_SEL_WAKE (matching or non-matching NAD), and IDLE for the sleep-timeout scenario
• Passive protocol checker: from-scratch oversampling/edge-detect, break/wake pulse-width classification, and PID-parity/checksum recomputation spanning both real cxpi_rx/cxpi_tx pins for a single frame decode (no code/instance sharing with the BFM), with a level-based wait for the node’s own driven response to correctly time its capture despite the DUT replying within a couple of clock cycles of PID completing
• Asymmetric rule design (mirroring vip-avsbus’s own checker): DUT-computed fields (the node’s own TX-direction response checksum, and non-matching-ID silence) are unconditionally flagged as violations; controller-driven, test-corruptible fields (PID parity, controller-supplied-data checksum) are independently recomputed and exposed for the testbench to assert on in context
• Directed scenarios cross-checked against the checker’s independent decode: an RX-direction and a TX-direction data-frame round trip, a non-matching-ID frame ignored in both directions, a PID-parity-error and a checksum-error frame (both err_code 3), sleep entry after a bus-idle timeout, a generic wake pulse, a matching- and a non-matching-NAD Selective Wake frame, and a local CTRL.WAKE_REQ force-wake — 0 checker violations, no false err_code 1/2/9
• Honestly scoped: inherits cxpi_node’s own v1 exclusions (no PWM lighting-dimming control, no dynamic NAD assignment, no CXPI group-addressing/flag-ID mechanism beyond simple NAD match, NAD/Selective-Wake bit-mapping pending reconciliation against the licensed JASPAR/JASO D 015 specification) — a VIP limitation only insofar as the paired DUT itself doesn’t implement those features to verify

Standards & Compliance

JASO D 015 Clock Extension Peripheral Interface (CXPI)

Pairs With

Built to lean against these catalog IPs during integration:

• cxpi_node