Available now — real, tested verification collateral, not a roadmap placeholder.
Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.
Shares the exact same deliverable as vip-usb2 against the same catalog usb2_dev RTL, since that RTL is confirmed — by reading its ULPI FSM, register map, and reset-time OTG_CTRL write — to be a fixed-role, device-only USB 2.0 Full-Speed link controller: it implements no host-mode ULPI signaling and no SRP/HNP state machine; the one “OTG_CTRL” register write at boot only configures the device-mode D+ pull-up, not a dual-role capability. This VIP therefore validates exactly the device-side link-layer packet exchange described in vip-usb2 and explicitly does NOT cover OTG role-swap, HNP (Host Negotiation Protocol), or SRP (Session Request Protocol) negotiation — because the underlying RTL has no host or dual-role path for this VIP to exercise, not merely because this VIP chose not to build one.
USB On-The-Go and Embedded Host Supplement
Built to lean against these catalog IPs during integration:
Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.
Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.
circuit-design.space · +1-971-357-1400 · sales@circuit-design.space