Available now — real, tested verification collateral, not a roadmap placeholder.
Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.
An independent Ethernet MAC-frame BFM and Clause-22 MDIO PHY-model BFM, written clean-room from the public IEEE 802.3 frame format and Clause 22 register-access spec — not derived from our own gmac RTL — exercised against the catalog’s real Gigabit-class GMAC. Covers the MAC-frame layer this PHY sits below: preamble/SFD/FCS-framed TX and RX byte streams plus MDIO register read/write round-tripped through an independent PHY register model, all independently CRC-32-checked by a passive frame checker. This entry and vip-eth-2g5 share the identical MAC-frame+MDIO deliverable, since the MAC-frame protocol is PHY-speed-independent; the 1000BASE-T-specific PHY layer (4D-PAM5 line coding, clause-28 auto-negotiation, master/slave clock-role resolution) sits below the byte-stream interface this VIP exercises and is not yet built. The AXI4-Lite TX/RX-DMA descriptor path is likewise out of scope for this first pass.
SEND_FRAME/CAPTURE_FRAME) with its own CRC-32 (Ethernet FCS) recompute, verified against the real gmac TX/RX byte-stream pathgmac‘s own MDIO controller and confirmed byte-exactIEEE 802.3ab (1000BASE-T) — MAC-frame + MDIO layer only
Built to lean against these catalog IPs during integration:
Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.
Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.
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