eDP 2.0

An independent clean-room eDP 2.0 Panel-Self-Refresh VIP: a source BFM, a separately written panel BFM that models the remote frame buffer and what is actually DISPLAYED, and a passive PSR checker (“edp2/, make edp2_oss, 17/17 checks). It covers panel power sequencing, PSR entry (capture, then and only then drop the link), PSR exit (link before video) and PSR2 selective update. The checker is passive: power ordering, PSR must be enabled before entry, no link drop while a capture is in flight, link up before live video on exit, no selective update outside an active PSR. SCOPE, stated rather than implied: the LINK layer is NOT re-verified here — vip-dp20 covers 8b/10b and vip-dp21 covers UHBR 128b/132b, and a third copy would add nothing. Link training, DSC, MST and the electrical panel-power rails are out of scope, and PSR commands are modelled as typed transactions rather than AUX byte traffic because vip-dp20 already owns the AUX wire format. This catalog has no eDP panel controller, so it is a BFM<->BFM self-check rather than DUT interop. The panel’s content model is the point of the VIP: a source can sequence PERFECTLY and still leave the panel showing the wrong frame, and T9 asserts exactly that — the ordering rules see what they can see, and only the modelled display content shows the user a wrong picture.

Key Features

• Panel power sequencing (panel-enable, link, backlight order)
• PSR entry: capture completes BEFORE the link drops — the classic implementation bug, checked
• PSR exit: link up before live video; PSR2 selective update onto the retained buffer
• Four injected faults; the fourth is visible only in the panel’s displayed-content model

Standards & Compliance

VESA Embedded DisplayPort (eDP) 2.0

Pairs With

Built to lean against these catalog IPs during integration:

• dp_link