Available now — real, tested verification collateral, not a roadmap placeholder.
Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.
An independent MIL-STD-1553B Bus Controller — Manchester II encode/decode, sync-pattern generation, and odd-parity word framing written clean-room from the public MIL-STD-1553B word format, not from our own mil1553 RT’s internal FSM. Verified BC-to-RT (Receive Command with multi-word data capture, APB read-back confirmed) and RT-to-BC (Transmit Command with status + data response, independently Manchester-decoded and parity-checked off the wire) over bus A, plus a passive protocol checker that recomputes parity/sync legality on the RT’s own transmit pins and hard-catches an injected bad-parity fault. RT-to-RT relay is not exercised (no second RT instance in this harness) and dual-redundant bus arbitration is confirmed inert, not working — this v0.1 RTL locks its bus-select to bus A at reset and never re-evaluates it (documented in the IP’s own “Deferred features”), which was verified by showing a command sent only on bus B is correctly ignored.
SEND_COMMAND/SEND_DATA_WORD/RECV_STATUS_WORD/RECV_DATA_WORD task API, plus a SEND_COMMAND_BAD_PARITY injection primitiveMIL-STD-1553B
Built to lean against these catalog IPs during integration:
Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.
Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.
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