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eDP 1.5/1.4b

An independent clean-room eDP 1.5/1.4b link bring-up VIP: a source BFM, a separately written panel BFM that publishes its own rate table and runs its own descrambler…

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shippingGroup DisplayStandard VESA Embedded DisplayPort (eDP) 1.5 / 1.4b

Available now — real, tested verification collateral, not a roadmap placeholder.

Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.

The deliverable

What you get

Bus-functional model
An independent driver for the protocol, written clean-room from the public specification — not derived from our own RTL, so it is a genuine second source.
Passive protocol checker
A monitor that watches the bus and asserts the spec’s rules continuously, so a violation fails the run where it happens rather than downstream.
Self-checking interop testbench
A one-command testbench that drives the model against real RTL and hard-checks the result — reproduce every claim on day one.

An independent clean-room eDP 1.5/1.4b link bring-up VIP: a source BFM, a separately written panel BFM that publishes its own rate table and runs its own descrambler, and a passive checker (“edp15/, make edp15_oss, 17/17 checks). It targets the two things eDP 1.4b/1.5 has that NOTHING else in this catalog verifies: (1) the eDP LINK-RATE TABLE — the panel publishes a table of supported rates and the source selects one BY INDEX (LINK_RATE_SET), a method mutually exclusive with DisplayPort’s bandwidth code and absent from DP entirely, so indexing past the end or mixing the two methods is a real bug no DP-generation VIP looks for; and (2) ASSR, the Alternate Scrambler Seed Reset, where both ends must agree on the seed. PSR is deliberately NOT re-modelled here — vip-edp2 covers it and the 1.x state machine is a subset — rather than listed twice to pad a feature list. SCOPE: the link layer is vip-dp20 (8b/10b) / vip-dp21 (UHBR); DPCD traffic is modelled as typed transactions because vip-dp20 owns the AUX wire format; no eDP panel controller exists here, so it is a BFM<->BFM self-check. The VIP’s sharpest result is a NEGATIVE one: a source that advertises ASSR and then scrambles with the STANDARD seed produces a DPCD handshake byte-identical to a correct one, so the passive checker is blind by construction — T8 asserts that silence while the panel’s independent descrambler recovers garbage.

Key Features

Standards & Compliance

VESA Embedded DisplayPort (eDP) 1.5 / 1.4b

Pairs With

Built to lean against these catalog IPs during integration:

Interested in the eDP 1.5/1.4b VIP?

Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.

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Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.

circuit-design.space · +1-971-357-1400 · anovickis@circuit-design.space