JESD204D/C/B

Independent JESD204B link-layer symbol-stream BFM, clean-room from the public JEDEC JESD204B spec — code-group sync via a /K28.5/ comma run, the 4-multiframe ILAS (/R//Q/config/A/ markers), and F-octet/K-frame steady-state framing — driven against the catalog’s own jesd204_rx receiver at the symbol/character level. The DUT’s own documented boundary starts from an already 8b10b-decoded octet stream, so the SERDES/CDR/8b10b PHY layer is out of scope by design on both sides, matching the DUT. A passive link checker independently re-derives frame/multiframe boundary timing from the TB’s own configured F/K and cross-checks sync_req_o (SYNC~) legality, with zero hierarchical peeking. Interop-proven: unsynced → CGS → ILAS → DATA, known sample octets deframed and confirmed on rx_sample_o, plus directed injections of a corrupted ILAS (caught by the DUT’s own safety monitor, err_code=3) and a mistimed frame-start pulse (caught by the checker). Exercised at single lane (LANES=1) and Subclass 0 — multi-lane deskew and Subclass 1/2 deterministic-latency (SYSREF/LMFC) are not modeled by this DUT (it has no SYSREF port) and remain roadmap.

Key Features

• Independent symbol-stream encoder for CGS (comma run), the 4-multiframe ILAS (/R//Q//A/ markers with config-octet capture), and F/K-configurable steady-state data framing — not derived from the target RTL’s internal FSM
• Passive link checker: independently counts F-octet/K-frame boundaries from the TB’s own configured values and cross-checks rx_frame_start_o/rx_multiframe_o timing, plus SYNC~ (sync_req_o) legality against an independently-observed comma run
• Full link bring-up proven end-to-end (unsynced → CGS → ILAS → DATA) with deframed sample readback confirmed on the real output pins, plus two directed injections (corrupted ILAS, mistimed frame-start) independently caught
• Scope: single lane (LANES=1), Subclass 0 only — multi-lane deskew and Subclass 1/2 deterministic-latency SYSREF/LMFC alignment are not implemented by the DUT (no SYSREF port exists) and are roadmap; 8b10b/SERDES PHY is out of scope by the DUT’s own boundary

Standards & Compliance

JEDEC JESD204B (link layer)

Pairs With

Built to lean against these catalog IPs during integration:

• jesd204_rx