Storage

NVMe 2.0/1.4

Host-controller-interface verification for NVMe over PCIe — Submission/Completion queue producer-consumer semantics and admin/IO command sets.

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plannedGroup StorageStandard NVM Express Base Specification 2.0 / 1.4

Planned — scoped for this wave; deliverables not yet built. Ask if you need it sooner.

Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.

The deliverable

What is scoped

Scoped, not yet built

This VIP is specified against the protocol’s public standard and scheduled for the current wave. The deliverables below describe the intended shape, not shipped code.

Ask if you need it sooner

Scoping is done, so a concrete date is a conversation away. Customer demand reorders the wave.

Same shape when it lands

Every shipping VIP arrives as a clean-room bus-functional model, a passive protocol checker, and a self-checking interop testbench.

Host-controller-interface verification for NVMe over PCIe — Submission/Completion queue producer-consumer semantics and admin/IO command sets.

Key Features

Submission Queue / Completion Queue (SQ/CQ) producer-consumer doorbell semantics
Admin and I/O command-set verification (Identify, Get/Set Features, Read/Write/Flush)
Namespace management and multi-queue (per-core) scenarios

Standards & Compliance

NVM Express Base Specification 2.0 / 1.4

Interested in the NVMe 2.0/1.4 VIP?

This VIP is scoped but not yet built — tell us your timeline and we will reorder the wave.

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Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.

circuit-design.space · +1-971-357-1400 · sales@circuit-design.space