Free tool

Source-Synchronous and DDR Timing Budget Calculator

Setup and hold margin for a source-synchronous or DDR interface, with every consumer of the unit interval listed and ranked. It shows what board length skew is actually worth relative to ISI, crosstalk and jitter — usually much less than the effort spent on it.

Interface rate — MT/s (DDR) or MHz (SDR)

Clocking

Receiver setup t_SU— ps

Receiver hold t_H— ps

Driver output skew t_DQSQ— ps, data vs strobe

Board length skew — ps, data vs strobe mismatch

Clock / strobe jitter — ps peak-to-peak

ISI and reflections — ps of eye closure

Crosstalk-induced jitter — ps

Derating / guard band — ps, voltage and temperature

Unit interval

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Setup margin

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Hold margin

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Eye remaining

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% of the UI

Consumer	ps	% of UI	Fixable by

Runs entirely in your browser. Nothing is uploaded, stored, or sent anywhere.

The unit interval is a budget, and everything takes a slice

A source-synchronous interface — DDR memory, a parallel camera bus, an LCD interface — gives the receiver a data window and a strobe to sample it with. The window is one unit interval wide, and it is the only thing you have. Every impairment takes a piece of it, and what survives is your margin.

The tool lists every consumer in the same units and ranks them, which is the part that changes decisions. Most timing arguments are conducted about one term while a larger one goes unexamined.

Length matching gets attention out of all proportion to its size

Board length skew is the term engineers spend the most effort on, because it is visible in the layout tool, easy to measure and satisfying to fix. It is also usually one of the smaller entries in the budget. Look at its share in the table: serpentining a bus to within a few mil buys a few picoseconds, while ISI, crosstalk and jitter routinely cost several times that and are invisible in the layout.

This is not an argument against length matching. It is an argument for spending proportionate effort: get the lengths inside a sensible tolerance, then go and look at termination, stackup and supply quality, which is where the rest of the window went.

What you can and cannot change

Receiver setup and hold, and driver output skew belong to the silicon. If they dominate, the answer is a different part or a lower rate — no amount of layout work touches them.
Board skew is entirely yours.
ISI and reflections come from termination, stubs and impedance control — see the loss budget and via stub tools.
Crosstalk jitter comes from spacing and layer choice; the crosstalk calculator quantifies it and shows that burying the bus removes far-end coupling entirely.
Jitter is supply quality on the PLL and the reference clock, which is where the crystal and jitter tools apply.

Simplified budget. This is a worst-case linear sum, which is the right basis for a guaranteed-by-design argument and is more pessimistic than reality — several of these terms are statistical and would combine in quadrature in a production population. It also does not model write levelling, per-bit deskew, read/write turnaround, or the training that modern DDR controllers perform, all of which recover margin that this budget assumes you do not have. For a real DDR interface the controller vendor's own budget spreadsheet is the authority.

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Each of these runs entirely in your browser. Nothing is uploaded, stored or sent anywhere, and none of them needs an email address.

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