SDIO / SDHC / UHS

An independent SD ‘card’ BFM, written clean-room from the public SD Physical Layer command/response and block-data specification — not derived from our own sdmmc RTL — so it functions as a true second source against the catalog’s SD/MMC host controller. Drives a basic init handshake (CMD0/CMD8/CMD1) plus single-block CMD17 READ and CMD24 WRITE with correctly-CRC7’d 48-bit command/response frames and CRC16-CCITT block data, backed by a passive protocol checker that independently re-validates CRC7/CRC16/start-end framing on the wire. Covers the CMD/RESP + single-block DAT command layer shared by SD/SDIO/SDHC/UHS; SDIO’s function-based I/O (CCCR, FBR, IO_RW_DIRECT/EXTENDED, in-band interrupt) is not yet modeled and is roadmap. 1-bit DAT bus and single-block transfers only today — 4-bit mode and multi-block are a documented follow-up. This same deliverable is shared with vip-emmc and vip-sduc, since all three modes build on the same physical command/DAT-block layer this VIP proves.

Key Features

• Independent card BFM: minimal init (CMD0/CMD8/CMD1) + CMD17/CMD24 single-block read/write, correctly-CRC7’d R1 responses
• Passive protocol checker: independently recomputed CMD-frame CRC7, DAT-block CRC16-CCITT, and start/end-bit framing legality
• Self-checking interop TB against the catalog’s real sdmmc host controller, plus a directed DAT CRC16 injection caught both by the DUT’s own safety path and the independent checker
• Scope today is 1-bit bus, single-block, core command layer only — SDIO function I/O, 4-bit DAT, and multi-block are roadmap, not yet built

Standards & Compliance

SD Physical Layer Specification (command/response + block-data layer)

Pairs With

Built to lean against these catalog IPs during integration:

• sdmmc