Available now — real, tested verification collateral, not a roadmap placeholder.
Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.
Two independent, clean-room BFMs — written from the public SAE J2716 SENT and LIN 2.x specifications, not from the catalog’s own sent/lin RTL — serve as a true second source for both protocols. The SENT BFM drives a full sync-pulse + status + data-nibble + CRC-4 frame on the timed tick grid the receiver expects; a passive checker independently re-decodes the falling-edge period stream and re-computes the CRC-4, catching an injected bad CRC nibble that the DUT’s own error path also flags. The LIN BFM is a full node — BREAK/SYNC/PID/DATA/CHECKSUM framing in both directions — proven against the catalog lin in both roles: as an independent master driving the DUT-as-slave capture path (classic and enhanced checksum), and passively decoding the DUT operating as its own master over a real wired-AND bus. A passive checker independently re-validates BREAK-field minimum length and checksum, catching both an injected bad checksum and an injected too-short break field. Building this VIP also caught and led to fixing a real lin RTL bug (2026-07-09): the RX-buffer SECDED check-bit array wasn’t cleared alongside the data buffer on a new frame, so switching from a longer frame to a shorter one without an intervening reset could latch a spurious double-bit-error safety fault against stale check bits — fixed by clearing the check-bit array at the same points the data buffer itself is cleared, verified against the IP’s full existing regression, cover, and k-induction proof coverage plus this VIP’s own interop TB. Scope today is the core frame shape for each: SPC trigger mode and automatic baud-rate detection / wake-sleep signaling are documented roadmap items, not yet built.
sent/lin: SENT RX-path decode; LIN slave-capture (classic + enhanced) and DUT-as-master generation over a real wired-AND bus — all pass; this second-source effort also caught and fixed a real stale-SECDED-check-bit safety-fault bug in lin (2026-07-09)SAE J2716 (SENT), LIN 2.x
Built to lean against these catalog IPs during integration:
Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.
Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.
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