A short list of resources, projects, and people I work with or
recommend.
PCBWay
The fab and assembly house behind most of the boards that leave this desk. We have sent work their way for years because the quality comes back right and the support engineers actually read the fab notes — which, if you have ever had a stackup quietly substituted, you will know is not universal.
They handle prototype through production: multilayer, controlled impedance, blind and buried vias, HDI, flex and rigid-flex, plus assembly and stencils. If you are taking one of our design tools as far as a real board, they are where we would send it.
Disclosure: this is a referral link, so if you order through it we may receive a referral benefit from PCBWay — at no extra cost to you, and it does not change your price. We sent work and recommendations their way for years before any referral programme existed, and the recommendation is not conditional on it.
My GitHub
A few selected repositories worth looking at:
- jax-boltzmann
— GPU-accelerated CMB Boltzmann solver in pure JAX. ~1,500 lines vs
CAMB’s ~50,000 lines of Fortran. Auto-differentiable Fisher matrices via
jacfwd. Currently v0.1.0 alpha; full Fortran-to-JAX port in
progress. - topological-em-structures
— research code for the topological-soliton physics work I publish on
Zenodo. Lattice Monte Carlo, Faddeev-Niemi field solvers, and the
supporting Python / C++ pipeline. - Altium-Schematic-Parser
— converts Altium.SchDocschematic files into JSON. Useful
when you need machine-readable access to Altium designs for tooling,
reviews, or migration. - Cores-VeeR-EH1
— working tree for the open-source Western Digital VeeR EH1 RISC-V core.
Useful as a starting point for embedded RISC-V projects. - dromajo —
RV64GC RISC-V emulator designed for RTL co-simulation. The right tool
when you need a lockstep reference next to your DUT. - chisel /
circt
— Chisel HDL and the CIRCT compiler infrastructure. The modern
open-source RTL stack. - coralnpu —
energy-efficient edge ML accelerator core. Relevant to current
AI-inference silicon work.
(Mix of original work and active forks I track for ongoing
projects. Tell me if any of these should be removed from the public list
or reordered.)
Tools I sell
- Publish
to Google Docs — Obsidian plugin, Pro — $20 lifetime.
One-click publish from Obsidian to Google Docs with LaTeX math, images,
callouts, tables, themes. Pro adds DOCX/PDF export, batch publishing, 5
themes, table-of-contents, and custom header/footer. Free core on GitHub;
upgrade to Pro via Gumroad.
People I work with
- Bit n Bit — friends + collaborators. When a project needs people who think the way they do, I bring them in, and they do the same in reverse. No commercial arrangement either way — nobody pays anybody a referral fee; work just goes to whoever fits it better.
Embedded and automotive software out of southeast Europe: AUTOSAR, QNX and C on the Infineon, Renesas, NXP and NVIDIA platforms, with the Vector, Tasking and Lauterbach toolchains that go with them. They staff dedicated teams rather than selling hours, which is what you want when the work outlasts a single engagement. The fit with this site is a clean one: the hardware, signal integrity and safety case stop at the board, and the software that has to run on it starts with them.A little more on themThe work spans more of the lifecycle than “development” suggests. Unit and integration testing, maintenance and support on code that has already shipped, fast prototyping, and start-up consulting for teams building their first embedded product. Model-based work in MATLAB sits alongside the hand-written C, and they run the CI themselves — Jenkins and CircleCI — rather than expecting a client to stand it up for them. In automotive the focus is ADAS specifically.
The engagement model is the part worth understanding before you call them. Two to ten engineers for a dedicated team, five to twenty for a full development centre, and they recruit into those teams in region rather than reassigning whoever happens to be free. By their own account clients arrive for one of three reasons: to extend in-house capacity, to reach expertise that simply is not hirable where they are, or to compress a schedule that will not otherwise make its date.
- Intensivate — partner company.
IntenCore (intenscale-core) is Intensivate’s RISC-V CPU core. A multi-context front end lets several hardware contexts time-share each execution pipeline, which gives enterprise-class throughput at low power and small area. The repository contains the Chisel RTL (built on Rocket Chip), a Verilator simulation flow with a DRAMSim3 DRAM model, and a bare-metal test and benchmark suite. The core is source-available under the Intensivate Non-Commercial Hardware Source License for research, education, personal use and evaluation. Commercial use needs a separate licence; contact info@intensivate.com.
github.com/kshalle/intenscale-core
Where to find me elsewhere
- LinkedIn: linkedin.com/in/alexnovickis
- Zenodo (research): Search Zenodo for
Alexander Novickis - Email: anovickis@circuit-design.space
- Phone: +1 (971) 357-1400