Thermal Via Array and Junction Temperature Calculator

Free tool

Thermal Via Array and Junction Temperature Calculator

Enter the dissipation, the package’s thermal resistance and your via array. The calculator returns the junction temperature, ranks the three thermal resistances in series, and shows what doubling the vias or the copper would actually buy you.

Junction temperature
Margin to TJ,max
°C
Total θJA
K/W, junction to air
Power at the limit
W before TJ,max
Thermal resistance in seriesK/WRiseShareWhat changes it

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Three resistances in series, and only one of them is yours

Heat leaves a power part through a chain: junction to the package’s thermal pad, pad through the board to the far side, and far side to the air. They add like series resistances, and the total sets the temperature rise for a given dissipation. Ranking them is the whole exercise, because effort spent on anything except the dominant term is close to wasted.

TJ = TA + P × (θJC + θvias + θcopper)
θvia = t / (kCu · Abarrel), with Abarrel the plated annulus  ·  θarray = θvia / N

θJC belongs to the part. You cannot improve it without changing the package, and it is often already small — a few K/W for a QFN with an exposed pad. If it dominates, your board is doing everything it can and the answer is a different device or a heatsink.

Why a via array works, and where it stops

A plated via is a copper tube, and copper conducts about a thousand times better than FR-4. A single 0.3 mm via with 25 µm of plating through a 1.6 mm board is roughly 185 K/W on its own — useless alone. Sixteen of them in parallel is about 12 K/W, which is transformative. That is the entire reason thermal via arrays exist, and why the count matters more than the size.

But they parallel, so the returns diminish sharply. Going from 4 vias to 8 might drop θJA by 20 K/W; going from 32 to 64 might drop it by 1. The tool shows what doubling actually buys at your current design point, which is usually the fastest way to see that you have already stopped benefiting.

Two practical constraints the arithmetic does not capture. Vias in a solder pad wick paste during reflow, which causes voiding and poor joints — they should be tented, plugged, or kept small, and your fabricator will have a preference. And a via only helps if the far side has somewhere for the heat to go; sixteen vias into an isolated 1 cm² pad achieve very little.

The copper term usually dominates, and it scales badly

Spreading copper to ambient is generally the largest of the three, and it improves only as roughly the square root of area. Doubling from 10 to 20 cm² buys far less than doubling from 1 to 2. Past a few tens of square centimetres a plane is close to saturated, and the remaining options are moving air, a heatsink, or conducting the heat into the enclosure.

The copper-to-air figure is an empirical approximation for still air with roughly 1 oz copper, fitted to typical published values. Real behaviour depends on orientation, enclosure, neighbouring parts, copper weight and how much of the plane is actually continuous. Treat it as a first estimate that gets you to the right order of magnitude and tells you which term to attack — not as a sign-off number.

Margin, and why 20 °C is not generous

A result that lands just under TJ,max is not a pass. Ambient inside an enclosure is higher than the air outside it, often by 15–25 °C. Thermal models carry real uncertainty. Interface materials degrade. Neighbouring parts heat each other. And silicon reliability is strongly temperature-dependent — the rule of thumb that failure rate roughly doubles per 10 °C is why the board FIT calculator asks for ambient, and why a part run hot enough to survive is not the same as a part run cool enough to last.

For safety-related hardware this connects directly to the failure-rate budget: the same 10 °C that looks like comfortable margin here can be a factor of two on the FIT total feeding an FMEDA rollup.

What this does not model

  • Transient behaviour. This is steady state. A part that pulses can survive a much higher peak dissipation because thermal mass absorbs it, and conversely a slow thermal time constant means a brief overload may not show up on a bench measurement.
  • Forced air, which can improve the copper-to-air term several fold and changes which term dominates entirely.
  • Coupling between parts. Two hot devices sharing a plane raise each other’s effective ambient, and neither datasheet mentions the other.
  • In-plane conduction into the rest of the board, including out through connectors and mounting hardware, which on a small board can be significant and is treated here only as spreading area.

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