Available now — real, tested verification collateral, not a roadmap placeholder.
Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.
An independent CAN node — SOF-aligned bit sampler, bit-de-stuffer, frame-field decoder, and a from-spec CRC-15 (polynomial 0x4599) — written clean-room from Bosch CAN 2.0 / ISO 11898-1, plus a passive protocol checker enforcing the bit-stuffing rule (no 6 consecutive equal bits from SOF through CRC) via its own field FSM so the CRC trailer doesn’t false-fire the check. This checker is not hypothetical: run against our own can_fd RTL it surfaced a real bit-stuffing gap, which was fixed and is now formally closed (0 violations, cross-checked by a bounded run-length property).
can_fd transmits to the independent node, decode + ACK hard-checkedcan_fd, since resolved and formally verifiedBosch CAN 2.0 A/B, CAN FD (Bosch spec + ISO 11898-1)
Built to lean against these catalog IPs during integration:
Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.
Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.
circuit-design.space · +1-971-357-1400 · sales@circuit-design.space