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AMBA / On-Chip Bus

OBI (Open Bus Interface)

House-only addition, not on any competitor’s catalog we’ve reviewed: a UVM instruction-fetch agent for the Open Bus Interface used by our rv32/rv32_lockstep CV32E-family cores and the…

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shippingGroup AMBA / On-Chip BusStandard OBI v1.5

Available now — real, tested verification collateral, not a roadmap placeholder.

Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.

The deliverable

What you get

Bus-functional model
An independent driver for the protocol, written clean-room from the public specification — not derived from our own RTL, so it is a genuine second source.
Passive protocol checker
A monitor that watches the bus and asserts the spec’s rules continuously, so a violation fails the run where it happens rather than downstream.
Self-checking interop testbench
A one-command testbench that drives the model against real RTL and hard-checks the result — reproduce every claim on day one.

House-only addition, not on any competitor’s catalog we’ve reviewed: a UVM instruction-fetch agent for the Open Bus Interface used by our rv32/rv32_lockstep CV32E-family cores and the obi_to_tl_ul bridge. Responds to fetch requests with the OBI req/gnt-then-rvalid/rdata handshake.

Key Features

Standards & Compliance

OBI v1.5

Pairs With

Built to lean against these catalog IPs during integration:

Interested in the OBI (Open Bus Interface) VIP?

Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.

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Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.

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