← All Verification IPAMBA / On-Chip Bus
TileLink (TL-UL)
A house UVM agent for TileLink Uncached-Lightweight — the on-chip bus this catalog’s own tl bridge and crossbar family speaks on one side of every protocol conversion.
shippingGroup AMBA / On-Chip BusStandard TileLink (SiFive), Uncached Lightweight conformance level
Available now — real, tested verification collateral, not a roadmap placeholder.
Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.
The deliverable
What you get
Bus-functional model
An independent driver for the protocol, written clean-room from the public specification — not derived from our own RTL, so it is a genuine second source.
Passive protocol checker
A monitor that watches the bus and asserts the spec’s rules continuously, so a violation fails the run where it happens rather than downstream.
Self-checking interop testbench
A one-command testbench that drives the model against real RTL and hard-checks the result — reproduce every claim on day one.
A house UVM agent for TileLink Uncached-Lightweight — the on-chip bus this catalog’s own tl_* bridge and crossbar family speaks on one side of every protocol conversion. Drives the A-channel (opcode/address/data/mask) and samples the D-channel response with the same driver/monitor pattern used across this repo’s other UVM testbenches.
Key Features
- A-channel drive: opcode/param/size/source/address/mask/data per TL-UL semantics
- D-channel response sampling and transaction correlation by
source - UVM driver + monitor + sequencer, packaged as a single reusable
tl_ul_agent - Active/passive mode split, same convention as the APB4 and OBI agents
Standards & Compliance
TileLink (SiFive), Uncached Lightweight conformance level
Pairs With
Built to lean against these catalog IPs during integration:
Interested in the TileLink (TL-UL) VIP?
Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.
Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.
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