AMBA / On-Chip Bus

CHI 5 (Issue E)

The deepest asset in this catalog’s VIP line: a clean-room CHI Home Node family spanning single-requester (credited TX-channel completion, DBIDResp/Comp/CompDBIDResp/CompData sequencing…

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shippingGroup AMBA / On-Chip BusStandard ARM AMBA 5 CHI (Issue E)

Available now — real, tested verification collateral, not a roadmap placeholder.

Verification IP is not safety-rated. These are testbench components — no ASIL target, no FMEDA, no IP-XACT, no safety-mechanism interface. They exist to help you verify a design, not to carry a safety argument. The safety soft-IP catalog is over here.

The deliverable

What you get

Bus-functional model

An independent driver for the protocol, written clean-room from the public specification — not derived from our own RTL, so it is a genuine second source.

Passive protocol checker

A monitor that watches the bus and asserts the spec’s rules continuously, so a violation fails the run where it happens rather than downstream.

Self-checking interop testbench

A one-command testbench that drives the model against real RTL and hard-checks the result — reproduce every claim on day one.

The deepest asset in this catalog’s VIP line: a clean-room CHI Home Node family spanning single-requester (credited TX-channel completion, DBIDResp/Comp/CompDBIDResp/CompData sequencing, injectable RespErr) up to full directory coherence — a per-line MESI directory Home Node driving snoops (SnpShared/SnpUnique) against a companion snoopable RN-F BFM that answers with downgrade/invalidate/dirty-forward. Proven directly against this catalog’s own kvce_chi_rnf (8/8 pass) and a 2-RN-F coherence scenario (16/16 pass, migration + downgrade + WriteBack).

Key Features

chi_hn_bfm — single-requester Home Node: credits RN-F TX channels, models backing memory, INJECT_DERR/INJECT_NDERR
chi_hn_dir_bfm — directory-coherent Home Node: per-line MESI state, issues SnpShared/SnpUnique, pulls dirty data forward
chi_rnf_bfm — snoopable RN-F: one cached line + MESI state, answers snoops with downgrade/invalidate/forward
Two self-checking interop TBs against real catalog RTL: single-requester smoke (8/8) and 2-RN-F directory coherence (16/16)

Standards & Compliance

ARM AMBA 5 CHI (Issue E)

Pairs With

Built to lean against these catalog IPs during integration:

Interested in the CHI 5 (Issue E) VIP?

Deliverables, the file manifest, and licensing terms are shared under a mutual NDA.

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Verification IP is testbench collateral and is deliberately not safety-rated: no ASIL target, no FMEDA, and no IP-XACT descriptor. It carries no functional-safety claim.

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